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901 commits

Author SHA1 Message Date
Chris Packham
ee23d7466c Revert "armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present"
This reverts commit c1da6fdb5c. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2023-11-17 11:58:26 -05:00
Andre Przywara
beeace9ba1 sunxi: refactor serial base addresses to avoid asm/arch/cpu.h
At the moment we have each SoC's memory map defined in its own cpu.h,
which is included in include/configs/sunxi_common.h. This will be a
problem with the introduction of Allwinner RISC-V support.

Remove the inclusion of that header file from the common config header,
instead move the required serial base addresses (for the SPL) into a
separate header file. Then include the original cpu.h file only where
we really need it, which is only under arch/arm now.

This disentangles the architecture specific header files from the
generic code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22 23:41:52 +01:00
Laurentiu Tudor
b9112cdfb5 armv8: fsl-layerscape: make some functions static
Some functions are not used outside this file, so make them static.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Laurentiu Tudor
487fa1aa97 fsl-layerscape: drop obsolete PPA secure firmware support
PPA was a secure firmware developed in-house which is no longer
supported and replaced by TF-A quite some years ago. Drop support
for it.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Simon Glass
9cbdc3a0fc spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR
Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:11 -04:00
Simon Glass
6a32bfae61 freescale: Drop call to init_func_vid() in the init sequence
Use the misc_init_f event instead, which is designed for this purpose.

All boards with CONFIG_VID already enable CONFIG_EVENT.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-31 13:16:55 -04:00
Tom Rini
7e6e40c572 Prepare v2023.10-rc3
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Merge tag 'v2023.10-rc3' into next

Prepare v2023.10-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-21 17:32:17 -04:00
Kevin Chen
fe85863086 armv8: Skip PIE in SPL due to load alignment fault.
When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start
and _rel_dyn_end symbol to be loaded to and executed at a
different address than it was linked at.

u-boot-spl.lds is used in SPL build, but relocation information
section(.rela*) were discarded.
In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds
 /DISCARD/ : { *(.rela*) }

If PIE enabled in SPL, __rel_dyn_start which is defined as
.rel_dyn_start in sections.c will be apended to the end of
.bss section.

In our ASPEED case, size of .bss section would let .rel_dyn_start
without 8-byte alignment, leading to alignment fault when
executing ldp instuction in pie_fix_loop.

Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
2023-08-17 16:39:20 -04:00
Tom Rini
a077ac13d0 Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0".  However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-09 09:21:42 -04:00
Shenlin Liang
0f621ca9b9 arm64: fsl: layerscape: Remove unused functions
Function board_switch_core_volt has not been used since it was
defined

Signed-off-by: Shenlin Liang <liangshenlin@eswincomputing.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-08-09 16:17:53 +08:00
Abdellatif El Khlifi
d998735179 arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

[1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token=

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2023-08-08 10:22:03 -04:00
Mathew McBride
07164d0ef1 arch: arm: fsl-layerscape: allow "opt-out" of fsl_setenv_bootcmd
Allow individual Layerscape boards to opt-out of fsl_setenv_bootcmd
by declaring the original function as weak.

fsl_setenv_bootcmd is used to change the bootcmd based on the
TF-A boot source (e.g QSPI vs SD/MMC) for reasons including
secure boot / integrity measurements and DPAA2 configuration loading.
See previous discussion at [1].

On the Ten64 board, our bootcmd is the same across
all TF-A boot sources so we don't want this behaviour.

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] https://patchwork.ozlabs.org/project/uboot/patch/20211110044639.7070-3-matt@traverse.com.au/#2790037

Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-08-03 09:40:50 -04:00
Tom Rini
94e7cb181a Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"
This reverts commit d927d1a808, reversing
changes made to c07ad9520c.

These changes do not pass CI currently.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-24 19:51:05 -04:00
Abdellatif El Khlifi
096d471a76 arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

[1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token=

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2023-07-24 15:30:02 -04:00
Michal Simek
1be82afa80 global: Use proper project name U-Boot
Use proper project name in comments, Kconfig, readmes.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Mathew McBride
8586a93868 armv8: fsl-layerscape: check for crypto node first in fdt_fixup_remove_jr
This a problem I found while updating the U-Boot fsl-ls1088a.dtsi
to match the Linux version.

fdt_fixup_remove_jr did not check whether there was a "crypto"
alias in the device tree before calling more fdt_* functions,
which resulted in a crash.

Fixes: a797f274
("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number")

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05 09:46:03 +08:00
Tom Rini
a27c8ea7f7 arm: Centralize fixed register logic
When building for ARM64, we need to pass -ffixed-x18 and otherwise pass
-ffixed-r9. Rather than having this logic in two places, we can do this
once in arch/arm/config.mk. Further, while gcc will ignore being passed
both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will
note that -ffixed-r9 is not used. Remove this duplication to also remove
the warning.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 15:31:27 -04:00
meitao
c1da6fdb5c armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does.
otherwise it will hang when enable mmu, that is what we encounter
in our SOC.

Signed-off-by: meitao <meitaogao@asrmicro.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3bf38943ae
2023-04-25 15:31:27 -04:00
Marc Zyngier
836b8d4b20 arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 417a73581a
2023-04-25 15:31:27 -04:00
Marc Zyngier
6cdf6b7a34 arm64: Use FEAT_HAFDBS to track dirty pages when available
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3c433724e6
2023-04-25 15:31:27 -04:00
Marc Zyngier
94d30f476f arm64: Reduce PT size estimation complexity
count_required_pts()'s complexity is high if mappings are not using the
largest possible block size (due to some other requirement such as tracking
dirty pages, for example).

Let's switch to a method that follows the pattern established with
the add_map() helper, and make it almost instantaneous instead of
taking a large amount of time if 2MB mappings are in use instead of
1GB.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
  upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 5d756d147e
Link: 6be9330601
2023-03-06 17:03:56 -05:00
Marc Zyngier
41e2787f5e arm64: Reduce add_map() complexity
In the add_map() function, for each level it populates, it iterates from
the root of the PT tree, making it ineficient if a mapping needs to occur
past level 1.

Instead, replace it with a recursive (and much simpler) algorithm
that keeps the complexity as low as possible. With this, mapping
512GB at level 2 goes from several seconds down to not measurable
on an A55 machine.

We keep the block mappings at level 1 for now though.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
  upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 96ad729cf4
Link: 6be9330601
2023-03-06 17:03:56 -05:00
Marc Zyngier
46dc542870 arm: cpu: Add optional CMOs by VA
Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked but also
because they are not broadcast between CPUs. Consequently, KVM traps and
emulates such maintenance in the host kernel using by-VA operations and
looping over the stage-2 page-tables. However, when running under
protected KVM, these instructions are not able to be emulated and will
instead result in an exception being delivered to the guest.

Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select
this option and perform by-VA cache maintenance instead of using the
set/way instructions.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <willdeacon@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. And fix some
  checkpatch warnings. Rebased to upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: db5507f47f
Link: 2baf54e743
2023-03-06 17:03:55 -05:00
Simon Glass
e7ec875dd1 Correct SPL use of SYS_FSL_ERRATUM_A010539
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_FSL_ERRATUM_A010539 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
dbcbbfd725 mtd: Drop unused CONFIG_S32V234
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Marek Vasut
11a1a3b73d arm: psci: Fix RESET2 hook
The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Andre Przywara
4871650c95 sunxi: armv8: fel: load only 32-bit values
Both the values and the MMIO addresses that we need during the 64-bit FEL
restore are smaller than 2^32, so we don't need to do any 64-bit loads.

Change the loads to only load 32 bits worth of data, that saves us some
bytes for storing the values.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
a84fa1bef4 nxp: Finish migration of SYS_FSL_SRDS_[12] to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
listed in arch/Kconfig.nxp and match how they're currently used by
select'ing them under the required PowerPC ARCH_xxx options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:23 -05:00
Tom Rini
89c90cadf3 nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
asked in arch/Kconfig.nxp.  Set the PowerPC defaults based on
arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in
drivers/mtd/nand/raw/fsl_ifc_nand.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
80c75ce00d fsl-layerscape: Rework usage of CONFIG_CLUSTER_CLK_FREQ
In the case where CONFIG_CLUSTER_CLK_FREQ is not defined, simply set
cluster_clk to get_board_sys_clk().

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
ae8a922bd2 arm: Rework usage of CONFIG_ARMV[78]_SECURE_BASE in linker scripts
In order to avoid defining CONFIG_ARMV[78_]SECURE_BASE as empty in the
linker scripts, if not already defined, add and use
__ARMV[78_]SECURE_BASE for when the base is not defined and we want the
linker scripts to continue.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Simon Glass
d81d17637a arm: Support trace on armv8
Use the notrace attribute so that timer functions can be used when
tracing. This is required to avoid infinite loops when recording a trace.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:13 -07:00
Tom Rini
f5dd0c5e19 configs: Remove unused or redundant CONFIG symbols
A number of CONFIG symbols have crept in that are never referenced in
code, so drop them here. Further, we have two symbols being enabled
in headers while already enabled correctly in Kconfig, so these lines
can also be removed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
1d457dbb91 global: Migrate CONFIG_MAX_MEM_MAPPED to CFG
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
4fd9373bbb net: Remove more legacy functions
Remove some of the board and arch specific non-DM_ETH helper code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
fc2240046c arm: Use the WEAK assembly entry point consistently
It is a bad idea, and more modern toolchains will fail, if you declare
an assembly function to be global and then weak, instead of declaring it
weak to start with. Update assorted assembly files to use the WEAK macro
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-12-06 15:30:30 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Tom Rini
aa6e94deab global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
2db82bf2bd Convert CONFIG_SYS_PMAN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_NOBQFMAN
   CONFIG_SYS_DPAA_DCE
   CONFIG_SYS_DPAA_FMAN
   CONFIG_SYS_DPAA_PME
   CONFIG_SYS_DPAA_RMAN
   CONFIG_SYS_PMAN

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
ecc8d425fd global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
91092132ba global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
6cc04547cb global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Sean Anderson
3ed84e73fb arm: layerscape: Disable unused parts of ICID tables
Several parts of the ICID table are only necessary for U-Boot proper.
Disable them in SPL. This saves around 500 bytes.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-18 09:32:52 +08:00
Sean Anderson
3d970cb264 arm: layerscape: Don't select FSL_IFC when booting from SD card
FSL_IFC should only be selected when booting from NAND flash (or when
NAND_FSL_IFC is enabled). The existing logic does this correctly when
QSPI is also enabled, but not when just booting from SD.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-18 09:32:51 +08:00
Sean Anderson
8fd111351c arm64: layerscape: Support SYSRESET
CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable
our version when it is enabled.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-17 15:17:56 +08:00
Sean Anderson
0c3eec2aea arm64: ls104x: Enable eDMA snooping
This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that marking i2c0 as dma-coherent works without issue.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-10-17 15:17:56 +08:00
Pali Rohár
ae17910117 armv8: cache_v8: Fix pgtables setup when MMU is already enabled
When MMU is already enabled then dcache_enable() does not call mmu_setup()
and so setup_all_pgtables() is also never called.

In this situation when some driver calls mmu_set_region_dcache_behaviour()
function then U-Boot crashes with error message:

    Emergency page table not setup.

Fix this issue by explicitly calling setup_all_pgtables() in dcache_enable()
function near condition for mmu_setup().

This change fixes chainloading U-Boot from U-Boot on Turris Mox board which
uses mvneta ethernet driver which calls mmu_set_region_dcache_behaviour().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-06 21:05:17 -04:00
Sean Anderson
bdbdaede67 ARMv8/sec_firmware: Convert to use fit_get_data_conf_prop
This reduces sec_firmware_get_data to a single call to
fit_get_data_conf_prop. I think sec_firmware_check_copy_loadable could also
be converted, but it does not map as straightforwardly, so I have left it
for a future cleanup.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-07 13:40:45 +08:00