Commit graph

11 commits

Author SHA1 Message Date
Rick Chen
edf0acb3b4 riscv: ae350: use the v5l2 driver to configure the cache
Find the UCLASS_CACHE driver to configure the cache controller's
settings.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03 09:31:03 +08:00
Rick Chen
d8fc1ef2f0 riscv: configs: AE350 will use CONFIG_OF_SEPARATE when boots from flash
When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of
CONFIG_OF_BOARD.

Also remove unused code about prior_stage_fdt_address.
And modify CONFIG_SYS_FDT_BASE as flash address.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
Rick Chen
e7e47f6391 riscv: configs: Support AE350 SMP booting from flash flow
Add two defconfigs to support AE350 SMP booting from flash.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-05-09 16:46:46 +08:00
Rick Chen
076b845893 riscv: ae350: enable SMP
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-04-08 09:45:08 +08:00
Rick Chen
ab3f92dee6 riscv: configs: Rename ax25-ae350 defconfig
Remove cpu name from the defconfig naming.
Because other cpus maybe run on AE350 platform.
So only use platfrom name in defconfig naming
will be better.

Also sync MAINTAINERS:
Rename
a25-ae350_32_defconfig as ae350_rv32_defconfig
ax25-ae350_64_defconfig as ae350_rv64_defconfig

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-18 13:25:55 +08:00
Bin Meng
44fe795c14 riscv: ax25: Hide the ax25-specific Kconfig option
There is no need to expose RISCV_NDS to the Kconfig menu as it is
an ax25-specific option. Introduce a dedicated Kconfig option for
the cache ops of ax25 platform and use that to guard the cache ops.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-12-18 09:56:26 +08:00
Rick Chen
48cbf62460 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE
to boot from ram which allow the board to override the fdt
address originally.

But after this patch
riscv: save hart ID and device tree passed by prior boot stage
It provide prior_stage_fdt_address which offer a temporary
memory address to keep the dtb address passing from loader(gdb)
to u-boot with a1.

So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and
can be removed. And it also somehow may corrupted BBL if it
was be arranged in CONFIG_SYS_SDRAM_BASE.

In board_fdt_blob_setup()
When boting from ram:
prior_stage_fdt_address will be use to reserved dtb temporarily.

When booting from ROM:
dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base.
Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM)
which is provided by HW.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2018-12-05 14:14:16 +08:00
Tom Rini
ef0b75d3d8 Merge git://git.denx.de/u-boot-riscv 2018-11-26 15:52:39 -05:00
Bin Meng
8cdc6b58d7 riscv: Remove mach type
Since the mach_id is not used by RISC-V, remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:19 +08:00
Rick Chen
44199ebc80 board: ax25-ae350: Support cfi flash
Add smc_init() to get register base from dts and
deal with atfsmc020 controler initialzation job.

Write protect is enabled by default. So WP shall
be disabled when startup, then cfi flash can be
detected and erasing and writing can be executed.

Adp-ae3xx and adp-ag101p both do smc initilize job
in lowlevel_init.S and get register base fron
CONFIG_FTSMC020_BASE. They also can be moved those
codes to board stage. Remind them as todo jobs.
After that CONFIG_FTSMC020_BASE can be removed.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:04 +08:00
Rick Chen
28c6cf2677 board: nx25-ae250: Rename as ax25-ae350
Rename
 nx25 as ax25
 ae250 as ae350
 nx25-ae250 as ax25-ae350
 including filename, variable, string and definition.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00