This converts the following to Kconfig:
CONFIG_SPL_OMAP3_ID_NAND
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Fix AM43XX drop AM44XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
For consistency with other platforms and in preparation of Kconfig
migration, let's change Several TI platforms that use I2C_BUS_MAX
to CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: Adam Ford <aford173@gmail.com>
- Move ANDROID_IMAGE_SUPPORT to top level Kconfig under images as it's
not strictly part of fastboot.
- Add some defaults for the fastboot buffer location and size
- Migrate all options listed in cmd/fastboot/Kconfig
- Cleanup the README
Signed-off-by: Tom Rini <trini@konsulko.com>
SUNXI_GMAC was still used to configure the code where as the
same has been renamed and moved to Kconfig in below commit
"sunxi: Move SUNXI_GMAC to Kconfig"
(sha1: 4d43d065db)
Signed-off-by: Dave Prue <dave@prue.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
[Tweek commit message, config_whitelist.txt, build-whitelist.sh]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Memory dt node update introduced by spl_fixup_fdt() in below
commit was making DDR configuration in-appropriate
to boot falcon mode. Hence added dram_init_banksize for
explicit assignment of proper base and size of DDR.
"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot"
(sha1: 6e7585bb64)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
boot mode, hence remove it from the boot device detecion. This
fixes a build error introduced with 3bd1642d4d ("imx: fix USB
boot mode detection for i.MX 6UL and 6ULL")
Fixes: 3bd1642d4d ("imx: fix USB boot mode detection for i.MX 6UL and 6ULL")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
U-boots spi-nor support is currently considered a work in progress. For
now to avoid issues it is necessary to add a "spi-flash" compatible
string. Eventually the "jedec,spi-nor" will be sufficient when the core
U-boot code is updated to support it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This imply was added when the option was moved by the moveconfig tool,
but the intention is not clear. Move it to defconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is now set up by the pinctrl driver when the NAND driver is
probed. Remove the legacy code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The new SoC PXs3 changed the address of PLL, but still uses the
same PLL name. We can not define SC_*PLLCTRL in the common header.
Move them to per-SoC .c file. Also, fix some PLL comments.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The #include <common.h> was added for mdelay(). Later, the declaration
of mdelay was moved to <linux/delay.h> by commit 5bc516ed66 ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").
There is no need to include <common.h> now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The soc_boot_modes array is only used by bmode command
and not needed in SPL. Don't include it into SPL.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
The eMMC controller for the A83T uses the new operating mode. Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Almost all of the newer Allwinner SoCs have a new operating mode for the
eMMC clocks that needs to be enabled in both the clock and the MMC
controller.
Details about that mode are sparse, and the name itself (new mode vs old
mode) doesn't give much details, but it seems that the it changes the
sampling of the MMC clock. One side effect is also that it divides the
parent clock rate by 2.
Add support for it through a Kconfig option.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D,
MX6Q and MX6QP processors move it to the soc.c file.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
With this change, it will be possible to de-select falcon mode & spl
will only boot U-Boot.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Suggested-by: Bo Shen <voice.shen@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
kASLR support in kernel requires a random number to be passed via
chosen/kaslr-seed propert. sec_firmware generates this random seed
which can then be passed in the device tree node.
sec_firmware reserves JR3 for it's own usage. Node for JR3 is
removed from device-tree.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
do_switch_ecc() calls fsmc_nand_switch_ecc(), which is a direct
function call into drivers/mtd/nand/fsmc_nand.c. However, this
function is not guarded by CONFIG_NAND_FSMC, which results to a build
failure if CONFIG_NAND_FSMC is disabled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The code in board/spear/common/ is not board-specific but
SoC-specific. Therefore, boards from other vendors than "spear" may
want to re-use this code, which is currently difficult with the code
being placed in board/spear/common/.
Since this code really is SoC-specific, this commit moves it to
arch/arm/cpu/arm926ejs/spear/, with the rest of the SPEAr related
code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
This re-syncs AM33xx DTS file with current file from
Linux v4.13-rc4 to ensure a consistent configuration. Upstream
Linux removed the redundant Interrupt-parent property from mmc,
mac, lcdc and tscadc sub nodes.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We need the clock available very early, add the u-boot,dm-pre-reloc
DT property on those nodes, so they come up very in the process.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
i.MX 6 serial downloader is not necessarily booting via UART but can
also boot from USB. In fact only some i.MX chips have serial
downloader support via UART (e.g. 6UL/ULL and Vybrid) but all of
them have serial downloader support via USB. Use the more appropriate
BOOT_DEVICE_BOARD define which is used for ROM provided recovery
mechanisms in general.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Add the reserved boot mode used in the bmode command for i.MX 6UL
and 6ULL as introduced in commit 3fd9579085 ("imx: mx6ull: fix USB
bmode for i.MX 6UL and 6ULL").
Also replace BMODE_UART with BMODE_RESERVED, which is more appropriate.
Commit 96aac843b6 ("imx: Use IMX6_BMODE_* macros instead of numericals")
added macros for boot modes, in the process the reserved boot mode got
named BMODE_UART. We use the reserved boot mode in the bmode command to
let the boot ROM enter serial downloader recovery mode. But this is only
a side effect, the actual boot mode is reserved...
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Some files for i.MX do not yet have the SPDX ID to reference the correct
license.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Since commit 576e3cc700 ("usb: host: xhci-dwc3: Add dual role mode
support from DT"), warning is displayed if dr_mode is not specified.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This reverts commit 82d075e79f.
Commit 82d075e79f ("ARM: uniphier: fix ROM boot mode for PH1-sLD3")
was a workaround for sLD3. Now the sLD3 SoC support has been removed.
Revert it to allow to simplify the init code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This reverts commit bcc51c1512.
Commit bcc51c1512 ("ARM: uniphier: move lowlevel debug init code
after page table switch") was intended to support lowlevel debug for
sLD3. Now the sLD3 SoC support has been removed.
Revert it to allow to enable lowlevel debug earlier.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since commit f0776a5517 ("spl: dm: Kconfig: SPL_CLK depends on
SPL_DM"), the following warning is displayed:
$ make uniphier_v8_defconfig
warning: (ARCH_ZYNQ && ARCH_ZYNQMP && STM32F7 && CLK_UNIPHIER) selects
SPL_CLK which has unmet direct dependencies (CLK && SPL_DM)
While I am here, I am removing the prompt to make it user-unconfigurable
option so that "select CLK_UNIPHIER" can be omitted.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The description for eMMC/SDIO/SDMMC src is not correct,
update the CRU_CLKSEL11_CON value definition according to TRM.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The DRAM start address is not 0, so need to update the last bank size
as:
DRAM start addr + DRAM_SIZE - last bank start addr
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
fdtdec.h is included, but not used in rk3399-board-spl.c: remove the
'#include'-statement.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
There are two same gmac node, remove one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Update the tx_delay and rx_delay to match the timing for
rk3399-firefly board to improve the stability of gmac data
transfer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
