4 commits

Author	SHA1	Message	Date
Kumar Gala	ed4b37e867	ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist ... The ddr_pd_cntl isn't defined in any reference manual and thus we wil remove especially since we set it to 0, which would most likely be its POR value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2009-10-03 09:04:15 -05:00
Poonam Aggrwal	33f3f34255	85xx: Added PCIe support for P1 P2 RDB ... Call fsl_pci_init_port() to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2009-08-28 17:12:46 -05:00
Kumar Gala	ec79d33b2c	85xx: Move to a common linker script ... There are really no differences between all the 85xx linker scripts so we can just move to a single common one. Board code is still able to override the common one if need be. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2009-08-28 17:12:39 -05:00
Poonam Aggrwal	728ece343e	85xx: Add support for P2020RDB board ... The code base adds P1 & P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>	2009-08-28 17:12:38 -05:00