Commit graph

83127 commits

Author SHA1 Message Date
Rick Chen
e0465f80bd riscv: Introduce AVAILABLE_HARTS
In SMP all harts will register themself in available_hart
during start up. Then main hart will send IPI to other harts
according to this variables. But this mechanism may not
guarantee that all other harts can jump to next stage.

When main hart is sending IPI to other hart according to
available_harts, but other harts maybe still not finish the
registration. Then the SMP booting will miss some harts finally.
So let it become an option and it will be enabled by default.

Please refer to the discussion:
https://www.mail-archive.com/u-boot@lists.denx.de/msg449997.html

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-26 14:29:13 +08:00
Nikita Shubin
c2bdf02c9d spl: introduce SPL_XIP to config
U-Boot and SPL don't necessary share the same location, so we might end
with U-Boot SPL in read-only memory (XIP) and U-Boot in read-write memory.

In case of non XIP boot mode, we rely on such variables as "hart_lottery"
and "available_harts_lock" which we use as atomics.

The problem is that CONFIG_XIP also propagate to main U-Boot, not only SPL,
so we need CONFIG_SPL_XIP to distinguish SPL XIP from other XIP modes.

This adds an option special for SPL to behave it in XIP manner and we don't
use hart_lottery and available_harts_lock, during start proccess.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-09-26 14:28:43 +08:00
Alison Huffman
206af3dec0 Fix out of bound access of ep array.
When processing USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE, and
USB_REQ_GET_STATUS packets in dwc2_ep0_setup an out of bounds access
can occur. This is caused by the wIndex field of the usb control packet
being used as an index into an array whose size is DWC2_MAX_ENDPOINTS (4).

Signed-off-by: Alison Huffman <alisn@google.com>
2022-09-26 01:49:36 +02:00
Jim Liu
693765a720 usb: host: nuvoton: Add nuvoton NPCM7xx ehci/ohci driver
Add nuvoton BMC NPCM750 ehci/ohci driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-09-26 01:49:36 +02:00
Tom Rini
9114b7cee8 sandbox SCSI conversion to driver model
final patch for blk improvements
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Merge tag 'dm-next-25sep22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next

sandbox SCSI conversion to driver model
final patch for blk improvements
2022-09-25 17:20:11 -04:00
Simon Glass
22c80d5603 sandbox: Add a test for SCSI
Add a simple uclass test for SCSI. It reads the partition table from a
disk image and checks that it looks correct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:56 -06:00
Simon Glass
46df024394 sandbox: Convert to use driver model for SCSI
At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:50 -06:00
Simon Glass
02cea1145a sandbox: scsi: Move request-handling code to scsi_emul
Move this code into the emulator file so it can be used by multiple
drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:38 -06:00
Simon Glass
5eff9d9c36 sandbox: Enable SCSI for all builds
This will be needed to run unit tests, once the SCSI code is used for USB
as well. Enable it for all sandbox builds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:22 -06:00
Simon Glass
1ac42900d8 sandbox: scsi: Move structs to header file
Move these to the SCSI header file so we can access them from multiple
emulators.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
e074df4d23 sandbox: scsi: Remove setup calls from handle_read()
Move the device-specific code out into the top-level function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
f75b6f76a4 sandbox: scsi: Move reply setup out of helper
Move this code out of the helper function so we can (later) add it as part
of the shared emulation code. Set a default value of 0 for buff_used since
that is what we use when there is an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
f148ad1b5f sandbox: scsi: Move file size into shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
a3718f1e53 sandbox: scsi: Move block size into shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
0c12d9dd23 scsi: Move vendor/product info into the shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
fc7a7ed3a6 sandbox: Move buffer to scsi_emul_info
Move the buffer into this struct so it can be shared between different
implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
1377d448a2 scsi: Move core emulation state into a new struct
In preparation for sharing the emulation code between two drivers, move
some of the fields into a new struct. Use a separate header file so it
can be used by various drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
0e0b9e9459 scsi: Move cmd_phase enum to the header
This can be used by common files, so move it to the SCSI header and rename
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
8bae79744b sandbox: usb: Rename transfer_len in protocol struct
This has the same name as a field in our local private struct, which is
confusing. Change the name to xfer_len instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
a966fa98b5 scsi: Tidy up comments for struct scsi_cmd
These comments are bit of a mess. Tidy them up to match the correct coding
style.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
8149b1500d blk: Rename if_type to uclass_id
Use the word 'uclass' instead of 'if_type' to complete the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Heinrich Schuchardt
a2a9317cbc sandbox: unblock signal before calling execv()
The following faulty behavior was observed. The sandbox configured with
CONFIG_SANDBOX_CRASH_RESET=y was invoked with

    ./u-boot -T -S

After executing `exception undefined' the sandbox reboots.
When executing `exception undefined' the sandbox exits with SIGSEGV.

The expected behavior is that the sandbox should reboot again.

If we are relaunching the sandbox in a signal handler, we have to unblock
the respective signal before calling execv(). See signal(7) man-page.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Tom Rini
81da5042e5 Merge branch '2022-09-24-add-console-flush' into next
To quote the author:
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.

Some console devices, like UART, have putc/puts functions which just put
characters into HW transmit queue and do not wait until all data are
transmitted. Doing some sensitive operations (like changing baudrate or
starting kernel which resets UART HW) cause that U-Boot messages are lost.

Therefore introduce a new flush() function, implement it for all serial
devices via pending(false) callback and use this new flush() function on
sensitive places after which output device may go into reset state.

This change fixes printing of U-Boot messages:
"## Starting application at ..."
"## Switch baudrate to ..."

In addition, take a patch from Heinrich to rename some EFI test
functions in order to not conflict with this series.
2022-09-24 13:58:49 -04:00
Pali Rohár
efc3f9526f boot: Call flush() before booting
In a lot of cases kernel resets UART HW. To ensure that U-Boot messages
printed before booting the kernel are not lost, call new U-Boot console
flush() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:38 -04:00
Pali Rohár
989cc40f80 serial: Call flush() before changing baudrate
Changing baudrate is a sensitive operation. To ensure that U-Boot messages
printed before changing baudrate are not lost, call new U-Boot console
flush() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:38 -04:00
Pali Rohár
78b5243182 serial: Implement serial_flush() function for console flush() fallback
Like in all other console functions, implement also serial_flush() function
as a fallback int console flush() function.

Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
enabled. So when it is disabled then provides just empty static inline
function serial_flush().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:37 -04:00
Pali Rohár
016e2be96d serial: Implement flush callback
UART drivers have putc/puts functions which just put characters into HW
transmit queue and do not wait until all data are transmitted.

Implement flush callback via serial driver's pending(false) callback which
waits until HW transmit all characters from the queue.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 10:47:01 -04:00
Pali Rohár
974f48366f console: Implement flush() function
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.

Therefore introduce a new flush() and fflush() functions into console code.
These functions will call .flush callback of associated stdio_dev device.

As this function may increase U-Boot side, allow to compile U-Boot without
this function. For this purpose there is a new config CONSOLE_FLUSH_SUPPORT
which is enabled by default and can be disabled. It is a good idea to have
this option enabled for all boards which have enough space for it.

When option is disabled when U-Boot defines just empty static inline
function fflush() to avoid ifdefs in other code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 10:47:01 -04:00
Pali Rohár
7df5b35334 sandbox: Add function os_flush()
It flushes stdout.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 10:47:01 -04:00
Heinrich Schuchardt
ca0f827dc7 efi_selftest: prefix test functions with efi_st_
An upcoming patch set creates a global function flush(). To make debugging
easier we should not use the same name for a static function.

Rename static functions in the LoadImage() unit test adding an efi_st_
prefix.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-24 10:47:01 -04:00
Tom Rini
694e900867 Merge branch '2022-09-23-4gb-ddr-in-32bit-ppc' into next
To quote the author, for the first 9 patches:
This patch series fixes U-Boot code to correctly handle RAM size larger
than 2 GB and then fixes fsl ddr driver to do not crash U-Boot when 4 GB
DDR module is detected when U-Boot operates in 32-bit mode (as opposite
of the 36-bit mode).

With this patch series it is possible to boot 32-bit U-Boot with 4 GB
SODIMM DDR3 module without crashes. U-Boot will still use just
CONFIG_MAX_MEM_MAPPED amount of RAM, but it is better than crashing due
to the truncating of 4GB value to 32-bit number (which is zero).

I tested this patch series on powerpc P2020 based board but only with
U-Boot v2022.04 because U-Boot master branch is still broken on P2020.

And then the final two patches here are (in my mind at least) related
clean-ups.
2022-09-23 18:42:53 -04:00
Pali Rohár
236f739627 board_f: show_dram_config: Print also real DRAM size
32-bit U-Boot builds cannot use more than around 2 GB of DDR memory. But on
some platforms/boards it is possible to connect also 4 GB SODIMM DDR memory.
U-Boot currently prints only effective size of RAM which can use, which may
be misleading as somebody would expect that this line prints total size of
connected DDR modules. So change show_dram_config code to prints both real
and effective DRAM size if they are different. If they are same then print
just one number like before. It is possible that effective size is just few
bytes smaller than the real size, so print both numbers only in case
function print_size() prints formats them differently.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
d179018e4c display_options: print_size: Fix order overflow
Function print_size() round size to the nearst value with one decimal
fraction number. But in special cases also unit order may overflow.

For example value 1073689396 is printed as "1024 MiB" and value 1073741824
as "1 GiB".

Fix this issue by detecting order overflow and increasing unit order.
With this change also value 1073689396 is printed as "1 GiB".

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
6f915a5d24 powerpc/mpc85xx: Fix re-align of unmapped DDR memory message for non-SPL builds
During init_dram() is called also setup_ddr_tlbs_phys() function which may
print message about unmapped DDR memory. So in this case print also
re-aligning filler after unmapped DDR memory message.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
eec715e30f powerpc/mpc85xx: Explain TLB unmapped memory message
Currently U-Boot SPL prints just generic message "2 GiB left unmapped".
Change it to more detailed "2 GiB of DDR memory left unmapped in U-Boot".
This is just U-Boot configuration and operating system may map more (or
also less) memory.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
a86e294f9f ddr: fsl: Fix re-align of verbose DRAM information for non-SPL builds
During init_dram() is called also compute_lowest_common_dimm_parameters()
function which prints multi-line detailed output. So print also re-aligning
filler after "Detected ?DIMM" line to have "DRAM:  " output aligned.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
2721997654 ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit mode
U-Boot core code already handles the case when RAM size is bigger than
CONFIG_MAX_MEM_MAPPED. So there is no need to do duplicate check in fsl ddr
driver for CONFIG_MAX_MEM_MAPPED. Instead simplify code to just check if
RAM size can be representable in phys_size_t type. And avoid printing
warning if phys_size_t is just 1 byte smaller than RAM size, which is the
typical situation with 4 GB DDR module.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
922460be0b ddr: fsl: Fix fsl_ddr_sdram_size() for 4GB modules with 32-bit phys_size_t
Function fsl_ddr_compute() always return size in unsigned long long type,
but function fsl_ddr_sdram_size() returns size in phys_size_t type.

When 36-bit addressing mode is not enabled then phys_size_t type is only
32-bit and thus it cannot store value 4GB (0x100000000). Function
fsl_ddr_sdram_size() in this case returns truncated value 0x0.

Fix this issue by returning the highest representable value, which is
0xffffffff (4GB - 1 byte).

This change fixes crashing of proper U-Boot because it detected 4 GB module
as RAM with zero size.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
cf4eba4eb6 ddr: fsl: Fix checking for maximal mappable memory
Check needs to be done against CONFIG_MAX_MEM_MAPPED macro and not fixed
size 4GB (as CONFIG_MAX_MEM_MAPPED can be lower and for example for e500
cores it is just 2GB). Also fix printf re-align, which should be applied
only for non-SPL builds, during init_dram() call.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
d92aee57ec board_f: Fix printing gd->ram_size and gd->ram_top
Members gd->ram_size and gd->ram_top are of type phys_addr_t which does not
have to fit into ulong type. So cast them into unsigned long long.

Fixes: 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-23 15:13:18 -04:00
Pali Rohár
049704f808 board_f: Fix types for board_get_usable_ram_top()
Commit 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.

So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.

Fixes: 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-23 15:12:42 -04:00
Pali Rohár
777aaaa706 common/memsize.c: Fix get_effective_memsize() to check for overflow
Ensure that top of RAM can be represented by phys_size_t type. If RAM is
too large or RAM base address is too upper then limit RAM size to prevent
address space overflow.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:11:13 -04:00
Pali Rohár
7210e457d5 common/memsize.c: Fix get_effective_memsize() to always check for CONFIG_MAX_MEM_MAPPED
CONFIG_MAX_MEM_MAPPED when defined specifies upper memory mapped limit.
So check for it always, and not only when CONFIG_VERY_BIG_RAM is defined.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-09-23 15:11:13 -04:00
Tom Rini
4057d64fae Merge branch '2022-09-23-add-mediatek-mt7986-support' into next
To quote the author:
This patch series add support for MediaTek MT7981/MT7986 SoCs with their
reference boards and related drivers.

This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for
these boards. The clock, pinctrl drivers and the SoC initializaton code
are also included.

Product spec for MT7986:
https://www.mediatek.com/products/home-networking/mediatek-filogic-830
2022-09-23 15:09:44 -04:00
Weijie Gao
812f3c4e0a MAINTAINERS: update maintainer for MediaTek ARM platform
Add new files for MediaTek ARM platform

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
3e3332130f tools: mtk_image: add support for nand headers used by newer chips
This patch adds more nand headers in two new types:
1. HSM header, used for spi-nand thru SNFI interface
2. SPIM header, used for spi-nand thru spi-mem interface

The original nand header is renamed to AP header.

Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
cadb1a858d tools: mtk_image: split the code of generating NAND header into a new file
The predefined NAND headers take too much spaces in the mtk_image.c.
Moving them into a new file can significantly improve the readability of
both mtk_image.c and the new mtk_nand_headers.c.

This is a preparation for adding more NAND headers.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
687e10ec49 tools: mtk_image: split gfh header verification into a new function
The verification code of gfh header for NAND and non-NAND are identical.
It's better to define a individual function to reduce redundancy.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
6136a23263 cpu: add basic cpu driver for MediaTek ARM chips
Add basic CPU driver used to retrieve CPU model information.

Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-23 15:09:16 -04:00
Weijie Gao
40746bf429 clk: mediatek: add clock driver support for MediaTek MT7981 SoC
This patch adds clock driver support for MediaTek MT7981 SoC

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00