Commit graph

76807 commits

Author SHA1 Message Date
Ilias Apalodimas
d6f8ab30a2 treewide: Remove OF_PRIOR_STAGE
The previous patches removed OF_PRIOR_STAGE from the last consumers of the
Kconfig option.  Cleanup any references to it in documentation,  code and
configuration options.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18 13:19:50 -04:00
Ilias Apalodimas
2ea63271e5 board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

So let's remove the option in an effort to simplify U-Boot's config and DTB
management,  and use OF_BOARD instead.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18 13:19:50 -04:00
Ilias Apalodimas
2e8d2f8843 riscv: Remove OF_PRIOR_STAGE from RISC-V boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t.  Apart from that they copy it to prior_stage_fdt_address,  if
the Kconfig option is selected, which is unnecessary.

So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-18 13:19:50 -04:00
Tom Rini
d990f7d75d Merge tag 'u-boot-rockchip-20211015' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for Rockchip mmc HS400 mode;
- Fix for px30 board Odroid Go;
- rockchip_sfc update;
- rk3568 clk update;
- doc fix;
2021-10-17 21:13:49 -04:00
Tom Rini
6a86f12126 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
On merge, fixup order of fdtdec_add_reserved_memory parameters in
arch/arm/cpu/armv8/fsl-layerscape/soc.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 18:30:33 -04:00
Tom Rini
86acfc9664 Merge branch '2021-10-15-Kconfig-migrations'
- Assorted Kconfig migration patches
2021-10-15 13:45:15 -04:00
Tom Rini
cdcbd593ad configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 09:42:22 -04:00
Marek Behún
56882dc4cb Convert CONFIG_USB_EHCI_IS_TDI to Kconfig
On mvebu this is defined if and only if !ARM64.

Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Marek Behún
645a0afb32 Drop CONFIG_USB_EHCI_KIRKWOOD
This config option doesn't do anything.

nas220 uses USB_EHCI_MARVELL.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Marek Behún
7b805009fa Convert CONFIG_USB_EHCI_MXS to Kconfig
This option is only used for
  mx23evk_defconfig
  mx23_olinuxino_defconfig
which are the only i.MX23 boards.

Add depend on ARCH_MX23 and default to y.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Marek Behún
92832045c5 Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
Yifeng Zhao
022f552704 mmc: rockchip_sdhci: enable strobe line for HS400
The default configuration of rk3399 EMMC PHY does not enable the
strobe line, and EMMC controller will got data transmission error
at HS400 mode.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:41 +08:00
Elaine Zhang
f2cdd44adb clk: rockchip: rk3568: update clks
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.

Change in V2:
remove change id.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:31 +08:00
Jon Lin
24c627b57a spi: rockchip_sfc: Using read_poll
Using read_poll logic.

Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:11 +08:00
Jon Lin
51f29239b7 spi: rockchip_sfc: Implement set_speed logic
Set clock related processing into set_speed logic. And Optimize
printing format.

Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:11 +08:00
Chris Morgan
193ab22797 rockchip: px30: sync serial flash controller bindings with mainline
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:55 +08:00
Johan Jonker
3ad88ecc6b doc: rockchip: write all brand names with a capital
Brand names are supposed to be written with a capital,
so change them all.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:43 +08:00
Johan Jonker
734dcdcbf2 doc: rockchip: sort rockchip support list for rk3188
In the list of mainline U-boot supported Rockchip boards
rk3188 is placed below under the name rv3188. Give back it's
original name and sort the list in alphabetical order.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:43 +08:00
Peter Robinson
63e13530fc rockchip: rk33xx: Drop ROCKCHIP_USB2_PHY on boards without it
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so
drop the configs as they were likely copied over from other
boards during enablement.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:30 +08:00
Chris Morgan
8d43e2412a rockchip: board: remove SCLK_GPU from U-Boot DT
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:09 +08:00
Chris Morgan
ef120e0b30 rockchip: px30: add support for setting cpll clock
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:09 +08:00
Patrick Delaunay
42d32c3552 Remove unused CONFIG_CONS_NONE
Remove the latest reference of CONFIG_CONS_NONE in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:52 -04:00
Patrick Delaunay
0d76e4ec8d Remove unused CONFIG_SYS_FLASH_AMD_CHECK_DQ7
Remove the latest reference of CONFIG_SYS_FLASH_AMD_CHECK_DQ7 in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:52 -04:00
Patrick Delaunay
155fb86e2c Remove unused CONFIG_NO_RELOCATION
Remove the latest reference of CONFIG_NO_RELOCATION in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
Patrick Delaunay
e7421b0e41 am33x: Remove unused define CONFIG_MUSB_HOST
This define was left over from a previous revision, and was never used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
Patrick Delaunay
ff07cc9ed1 scripts: remove some configs in config_whitelist.txt
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.

for example:
  doc/uImage.FIT/command_syntax_extensions.txt:
     ... #ifdef CONFIG_OF_*  |	...

  cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
     FLASH|MMC|FAT|EXT4|\

Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
Tom Rini
2d34be0a9e Merge branch '2021-10-14-assorted-updates'
- Update to LLVM-13 in CI, assorted PCI fixes and pytest in CI
  improvements
2021-10-15 07:50:59 -04:00
Holger Brunck
35b2b5f04c board/km: update MAINTAINERS files
Update the e-mail addresses and person responsible.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
CC: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
CC: Rainer Boschung <rainer.boschung@hitachienergy.com>
2021-10-14 19:45:07 -04:00
Simon Glass
35839eda8b pytest: Show a message when sandbox crashes
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.

With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.

So instead of:

test/py/u_boot_spawn.py:171: in expect
    c = os.read(self.fd, 1024).decode(errors='replace')
E   OSError: [Errno 5] Input/output error

We get:

test/py/u_boot_spawn.py:171: in expect
    c = os.read(self.fd, 1024).decode(errors='replace')
E   ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14 19:45:07 -04:00
Pali Rohár
c3aea68705 pci: Fix printf format for regions
Correct printf format for unsigned long long is %llx and not %llxx.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
43dad07cd4 pci: Fix showing registers
Header type is 7-bit number so use all 7 bits when detecting header type
and not only 2 bits.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
e6335d3eaa pci: Fix showing bars
Header type is 7-bit number so properly clear upper 8th bit which
indicates multifunction device.

And do not try to show bars for unsupported header types.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
c7cd6f734b pci: Fix configuring BARs
Number of BARs is defined by header type, not by class code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
63ae80dd98 pci: Skip configuring invalid P2P bridge devices
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Pali Rohár
b9caab8b47 pci: Skip configuring PCI Rom Address for unsupported header types
PCI Rom Address is currently supported only for Normal (0x00) and
Bridge (0x01) header types. Fix code accordingly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
Simon Glass
b04f64aa48 pytest: Shorten traceback length by default
This produces a lot of code output which is not very helpful and is quite
annoying to wade through. Use the short format by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14 19:45:07 -04:00
Tom Rini
927e0eedfc CI: Update to LLVM-13
- Switch sources and CI scripts to install and use LLVM-13
- Update to latest "focal" tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-14 19:45:07 -04:00
Thierry Reding
a0ba216ed4 ARM: tegra: Copy memory-region-names property
If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
77409c7f83 ARM: tegra: Refactor DT update helpers
Rather than duplicate the Ethernet MAC address and carveout updating
code for each board, move it to a common location and make it more
reusable.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
f814ff5e0b ARM: tegra: Support EMC frequency tables on Tegra210
The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.

Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
db8a0306c9 ARM: tegra: Support multiple reserved memory regions
Support multiple reserved memory regions per device to support platforms
that use both a framebuffer and color conversion lookup table for early
boot display splash.

While at it, also pass along the name, compatible strings and flags of
the carveouts.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
b9aad37591 fdtdec: Support reserved-memory flags
Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.

This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
9019487608 fdtdec: Reorder fdtdec_set_carveout() parameters for consistency
The fdtdec_set_carveout() function's parameters are inconsistent with
the parameters passed to fdtdec_add_reserved_memory(). Fix up the order
to make it more consistent.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
46cb067803 fdtdec: Support compatible string list for reserved memory
Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
4bf88ba76a fdtdec: Support retrieving the name of a carveout
When retrieving a given carveout for a device, allow callers to query
the name. This helps differentiating between carveouts when there are
more than one.

This is also useful when copying carveouts to help assign a meaningful
name that cannot always be guessed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Thierry Reding
d5598cfa9b fdtdec: Allow using fdtdec_get_carveout() in loops
In order make it possible to use fdtdec_get_carveout() in loops, return
FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles
present in the given property.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
Tom Rini
10cd8efe1a Merge branch '2021-10-12-assorted-fixes-and-updates'
- Add Macronix raw NAND controller, fastboot, spelling and nvme fixes,
  ds1307 fix for oscillator-stop bit and fatfs optimization.
2021-10-13 10:14:35 -04:00
Stefan Agner
30ac0b496b nvme: invalidate correct memory range after read
The current code invalidates the range after the read buffer since the
buffer pointer gets incremented in the read loop. Use a temporary
pointer to make sure we have a pristine pointer to invalidate the
correct memory range after read.

Fixes: 704e040a51 ("nvme: Apply cache operations on the DMA buffers")
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-10-12 16:49:21 -04:00
Vagrant Cascadian
2c6bcab6e6 tools/image-host.c: Fix spelling of "expected".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12 16:49:21 -04:00
Mark Tomlinson
07c652400d rtc: ds1307: Handle oscillator-stop bit correctly
The DS1307 driver was originally based on the DS1337 driver. However,
the functionality of the clock set/get functions has diverged. In the
original DS1337 driver, the set/get functions did the following:
  1) Setting the clock ensured the oscillator was enabled.
  2) Getting the clock checked and reset the oscillator-stop flag.
The DS1307 does not have an oscillator-stop flag, but the driver tried
(incorrectly) to emulate this by ensuring the oscillator was running. It
really makes no sense to start a stopped clock without setting it.

This patch makes the DS1307 driver behave like the original DS1337
driver again. For the DS1307 itself, this is just a removal of code,
since there is no oscillator-fail bit to check or reset, and the clock
is started when it is set. Since the DS1307 driver can now also be used
for the DS1337 and DS1340 which do have this bit, add code to handle the
oscillator-stop bit in the same was the original DS1337 driver did --
i.e. report that the oscillator had stopped and clear the flag.

This means that setting the date using the date command (which does both
a get and a set) will now clear the oscillator-stop flag in addition to
setting and starting the clock.

The old-style (non-DM) code has not been updated and will be removed in
a future patch. Note that this older code does not support the DS1337,
as there is a separate driver for this. Also note that the original (DM)
code used the wrong control-register address for the DS1337.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
2021-10-12 16:49:21 -04:00