Commit graph

89660 commits

Author SHA1 Message Date
Simon Glass
2354daaf39 spl: Use the correct FIT_..._PROP constants
Rather than open-coding the property names, use the existing constants
provided for this purpose. This better aligns the simple-FIT code with
the full FIT implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
035ab46e39 spl: Move the full FIT code to spl_fit.c
For some reason this code was put in the main spl.c file. Move it out
to the FIT implementation where it belongs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
d7c232e6b5 spl: Rename spl_load_fit_image() to load_simple_fit()
We have two functions called spl_load_fit_image(), one in spl.c and one in
spl_fit.c

Rename the second one, to indicate that it relates to simple FIT parsing,
rather than the full version.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
17ba50106e spl: Remove #ifdefs with BOOTSTAGE
This feature has some helpers in its header file so that its functions
resolve to nothing when the feature is disabled. Add a few more and use
these to simplify the code.

With this there are no more #ifdefs in board_init_r()

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
2003a83cc8 spl: Avoid an #ifdef when printing gd->malloc_ptr
Use an accessor in the header file to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
7907a7b99a dm: core: Correct help in TPL_DM and VPL_DM
There are copying errors in the help. Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
5bcacd1ad5 doc: Clean up SYS_MALLOC_SIMPLE
Move the useful help to Kconfig.

Drop mention of CONFIG_SYS_MALLOC_SIMPLE since it doesn't exist.

Correct a 'CONFIGSYS_MALLOC_F_LEN' typo

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
34bacebd0a Tidy up uses of CONFIG_SYS_MALLOC_F_LEN
Use CONFIG_SYS_MALLOC_F instead to of CONFIG_SYS_MALLOC_F_LEN to
determine whether pre-relocation malloc() is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
3d6d507514 spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN
Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
malloc pool exists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-10-06 14:38:12 -04:00
Simon Glass
a572041807 tpl: Enable CONFIG_TPL_SYS_MALLOC_F where needed
Enable CONFIG_TPL_SYS_MALLOC_F for boards which have a non-zero value
for CONFIG_TPL_SYS_MALLOC_F_LEN

Note that the default is yes in most cases, so no changes are needed to
board defconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
7431b0ad54 spl: Enable CONFIG_SPL_SYS_MALLOC_F where needed
Enable CONFIG_SPL_SYS_MALLOC_F for boards which have a non-zero value
for CONFIG_SPL_SYS_MALLOC_F_LEN

Note that the default is yes in most cases, so no changes are needed to
board defconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
fd8497dae5 spl: Create proper symbols for enabling the malloc() pool
For U-Boot proper we have CONFIG_SYS_MALLOC_F which indicates that a
malloc() pool is available before relocation.

For SPL we only have CONFIG_SPL_SYS_MALLOC_F_LEN which indicates the
size of the pool.

In various places we use CONFIG_SPL_SYS_MALLOC_F_LEN == 0 to indicate
that there is no pool.

This differing approach is confusing. Add a new CONFIG_SPL_SYS_MALLOC_F
symbol for SPL (and similarly for TPL and VPL). Tidy up the Kconfig
help for clarity.

For now these symbols are not used. That is cleaned up in the following
patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
77b9b187e9 serial: Drop mention of SPL/TPL_SYS_MALLOC_F
These symbols do not (yet) exist, so drop the usage of them in the
serial Kconfig file. It has no effect.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
f817e08ff2 spl: Drop the switch() statement for OS selection
This code is pretty ugly, with many #ifdefs

There are quite a lot of IH_OS_U_BOOT values so the compiler struggles
to create a jump table here. Also, most of the options are normally
disabled.

Change it to an else...if construct instead. Add an accessor for the
spl_image field behind an #ifdef to avoid needing #ifdef in the C code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
e0be6eaf58 spl: Avoid #ifdef with CONFIG_SPL_PAYLOAD_ARGS_ADDR
Move the condition to the header file to improve readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
6371c47999 spl: Drop #ifdefs for BOARD_INIT and watchdog
Avoid using the preprocessor for these checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
6c2bdf5c1a spl: mx6: powerpc: Drop the condition on timer_init()
It doesn't make sense to have some boards do this differently. Drop the
condition in the hope that the maintainers can figure out any run-time
problems.

This has been tested on qemu-ppce500

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-10-06 14:38:12 -04:00
Simon Glass
52779874da spl: Avoid #ifdef with CONFIG_SPL_SYS_MALLOC
Use IF_ENABLED_INT() to avoid needing to use the preprocessor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:11 -04:00
Simon Glass
9cbdc3a0fc spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR
Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:11 -04:00
Simon Glass
82e26e0d68 spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_...
We like to put the SPL first so it is clear that it relates to SPL. Rename
various malloc-related options which have crept in, to stick to this
convention.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-10-06 14:38:11 -04:00
Tom Rini
be2abe73df Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ ae350: modify memory layout and target name
+ ae350: use generic RISC-V timer driver in S-mode
+ Support bootstage report for RISC-V
+ Support C extension exception command for RISC-V
+ Add Starfive timer support
2023-10-05 13:26:44 -04:00
Tom Rini
cb59d23584 Merge branch '2023-10-04-TI-dts-updates'
- Resync some TI K3 DTS files, to fix booting on them.
2023-10-05 10:48:21 -04:00
Tom Rini
25453dcf0d moveconfig: enhance output; rename to qconfig
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 bWl1bS5vcmcACgkQfxc6PpAIreb9aggArQ9wh13E/diV35yLa0fRR/tLzfoazheW
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 FCKh/TORq7Ybi7pnwFVbgewMQgo7nCRkKSWhWV2lL35RtYzKW6FCz6H+70q4gRmR
 J/CFqpyAkEc73fzMxAnLnegTUnPbJpy6+enSYK3ZpnXX4SshbY95lcmMYLEftPMS
 FTizDl/C3WT0mKt61pZa49D+fkfZARrZpL+steP6BWuECnkW4I1Uyw==
 =AOrV
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-4oct23' of https://source.denx.de/u-boot/custodians/u-boot-dm

moveconfig: enhance output; rename to qconfig
2023-10-04 18:49:58 -04:00
Neha Malcom Francis
69b19ca67b arm: dts: k3-j721e: Sync with v6.6-rc1
Sync k3-j721e DTS with kernel.org v6.6-rc1.

	* Use mcu_timer0 defined in k3-j721e-mcu-wakeup.dtsi and remove
	  timer0, we have its clocks set up in clk-data now
	* Remove hbmc node as support is buggy and needs to be fixed
	* Remove aliases and chosen node, use them from Kernel
	* Remove /delete-property/ and clock-frequency from sdhci,
	  usbss, and mcu_uart nodes as we have them in clk and dev data
	* Remove dummy_clocks as they are not needed
	* Remove cpsw node as it is not required since it has been fixed
	  in U-Boot
	* Remove pcie nodes, they are not needed
	* Remove mcu_i2c0 as it is used for tps659413 PMIC in j721e-sk
	  for which support is not yet added
	* Change secproxy nodes to their Linux definitions
	* Remove overriding of ti,cluster-mode in MAIN R5 to default to
	  lockstep mode same as Kernel
	* Retain tps6594 node as TPS6594 PMIC support is still under
	  review in the Kernel [1], cleanup will be taken post its merge

[1] https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-04 14:16:01 -04:00
Neha Malcom Francis
d73851be43 arm: dts: k3-j721e-r5: Clean up inclusion hierarchy
Get rid of k3-j721e-r5-*-u-boot.dtsi as it is not
necessary. Change the inclusion hierarchy to be as follows:

	k3-j721e-<board>.dts---
			       -
			        -->k3-j721e-r5-<board>.dts
			       -
k3-j721e-<board>-u-boot.dtsi---

Reason for explicitly mentioning the inclusion of -u-boot.dtsi in code
although it could've been automatically done by U-Boot is to resolve
some of the dependencies that R5 file requires.

Also remove duplicate phandles while making this shift as well as remove
firmware-loader as it serves no purpose without "phandlepart" property.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-10-04 14:16:01 -04:00
Neha Malcom Francis
5b2671594b configs: j721e: Remove HBMC_AM654 config
Kernel commit d93036b47f35 ("arm64: dts: ti: k3-j721e-mcu_wakeup: Add
HyperBus node") was merged to kernel without its dependent patch [1].
Similar fix is needed in U-Boot, and hbmc currently breaks boot. Till
this gets fixed in U-Boot, disable the config by default so that the
hbmc probe that happens in board/ti/j721e/evm.c will not take place
and lead to boot failure.

[1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-10-04 14:16:01 -04:00
Neha Malcom Francis
a9c2b7326b drivers: firmware: ti_sci: Get SCI revision only if TIFS/SYSFW is up
When setting up boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which calls dm_timer_init()
which then gets the tick-timer: mcu_timer0. mcu_timer0 uses k3_clks
(clock controller) and k3_pds (power controller) from the dmsc node that
forces probe of the ti_sci driver of TIFS that hasn't been loaded yet!
Running ti_sci_cmd_get_revision from the probe leads to panic since no
TIFS and board config binaries have been loaded yet. Resolve this by
moving ti_sci_cmd_get_revision to ti_sci_get_handle_from_sysfw as a
common point of invocation for both legacy and combined boot flows.

Before doing this, it is important to go through whether any sync points
exist where revision is needed before ti_sci_get_handle_from_sysfw is
invoked. Going through the code along with boot tests on both flows
ensures that there are none.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-10-04 14:16:01 -04:00
Neha Malcom Francis
50fa67d091 arm: mach-k3: j721e_init: Move clk_k3 probe before loading TIFS
When setting boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which eventually calls
dm_timer_init() to grab the tick-timer, which is mcu_timer0. Since we
need to set up the clocks before using the timer, move clk_k3 driver
probe before k3_sysfw_loader to ensure we have all necessary clocks set
up before.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-10-04 14:16:01 -04:00
Neha Malcom Francis
dd0169f033 arm: mach-k3: j721e: dev-data: Add mcu_timer0 ID
U-Boot uses mcu_timer0 as the tick-timer, so add it to device list.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Nishanth Menon
0cb6515cda arm: dts: k3-am625-beagleplay: Fix Boot
Since commit [1] A53 u-boot proper is broken. This is because nodes
marked as 'bootph-pre-ram' are not available at u-boot proper before
relocation.

To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.

[1]
9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Reported-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
2023-10-04 14:16:01 -04:00
Roger Quadros
6d35682fb6 arm: dts: k3-am625-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
main_conf is required for phy_gmii_sel.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes the below dts warnings:

<stdout>: Warning (reg_format): /bus@f0000/syscon@100000/phy@4044:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (reg_format): /bus@f0000/ethernet@8000000/ethernet-ports/port@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f0000/syscon@100000: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #size-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
7e5b6f1cff arm: dts: k3-am625-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

[1]
9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
2f35889298 arm: dts: k3-am642-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes below dts warnings:

<stdout>: Warning (reg_format): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f4000/ethernet@8000000/mdio@f00: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@48000000/dma-controller@485c0100:msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@48000000/dma-controller@485c0000:msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (phys_property): /bus@f4000/ethernet@8000000/ethernet-ports/port@2:phys: Could not get phandle node for (cell 0)

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
f3285deeca arm: dts: k3-am642-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

Move cbass_mcu node to -r5-sk.dts as it is only required
for R5 SPL.

[1]
9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
398bd2965c arm: dts: k3-am64-evm: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
USB and MMC nodes need pinmux.

Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes below dts warning:

<stdout>: Warning (dmas_property): /bus@f4000/ethernet@8000000:dmas: Could not get phandle node for (cell 0)

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
c043ba97d8 arm: dts: k3-am64-evm: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

Move vtt_supply and cbass_mcu node to -r5-evm.dts as
it is only required for R5 SPL.

[1]
9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Simon Glass
4840b71bb0 qconfig: Update the documentation
Update qconfig's documentation to better reflect its new purpose in life.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:22 -06:00
Simon Glass
519637929b qconfig: Rename the database file
Use qconfig.db as the new name, to reflect the tool's purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:22 -06:00
Simon Glass
ea4d6dead3 moveconfig: Rename the tool to qconfig
This does not move configs anymore, but queries them, based on a database
it can build. Rename the tool to better reflect its purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
94e2ed7c8e moveconfig: Move summaries to the end
Write the summary for -s and -b at the end, using a unified format.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
fc07d99e6a moveconfig: Drop the initial output
Since moveconfig now just does what it is told (build database or sync
defconfigs) we don't need to print what it is doing. Drop this info, which
is of very little use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
dc1d2e6c7f moveconfig: Show a summary at the end
Rather than printing all the failed boards, which are now easily visible
on the terminal, just show a summary. Sort it by defconfig and drop the
'_defconfig' suffix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
6b25d21c86 moveconfig: Show failures in progress
Show the number of accumulated failures when processing. Use a shorter
format with colour.

An unwanted space appears before the defconfig name on every item except
the last. Fix that while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
15f19ab501 moveconfig: Use u_boot_pylib for terminal colour
Use the existing terminal code to handle ANSI colours. Enable colour by
default if the output is going to a terminal.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
95f0914ee8 moveconfig: Avoid showing progress at the end
When the process is finished, moveconfig leaves a line saying that all
boards were processed (for better or worse). Drop this, since it is
unncessary.

Future work will provide a summary at the end instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
9461bf0d65 moveconfig: Reduce the amount of output
Output a single line in the case where the defconfig only has one line
of output. Show the name without the _defconfig suffix, since that is the
same for all boards.

Use a list for the log so it is easier to process at the end.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
5aba58cf3b moveconfig: Only show output when there is a reason
There is no point in listing a board if everything went well. It makes it
harder to see the failures, particularly on a fast machine.

Suppress output unless something actually happened.

Drop the 'Syncing by savedefconfig' since this is selected by the -s and
is the same for all boards in this mode.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
f297ba33e9 moveconfig: Fix misc pylint warnings
Fix various remaining pylint warnings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
e6c686f405 moveconfig: Use an encoding with open()
Fix pylint warnings about needing an explicit character encoding.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00
Simon Glass
b774ba52c6 moveconfig: Correct list-comprehension warnings
Correct some pylint warnings about needing to use list comprehension.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:21 -06:00