Device tree alignment with Linux kernel v6.6.rc1.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
- Add st,digbypass on clk_hse node (needed for board rev.C)
- MLAHB/AHB max frequency increased from 200 to 209MHz, with:
- PLL3P set to 208.8MHz for MCU sub-system
- PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
- PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
- PLL4P set to 99MHz for SDMMC and SPDIFRX
- PLL4Q set to 74.25MHz for EVAL board
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard
Waiting Kernel upstream for alignment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>