Commit graph

9 commits

Author SHA1 Message Date
Simon Glass
72db28ee68 x86: Define a region for device priv/plat data
Collect this together in one place, so driver model can access set it up
in a new place if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26 17:03:09 +13:00
Simon Glass
76baecf670 x86: spl: Make moving BSS conditional
At present BSS is always placed in SDRAM. If a separate BSS is not in use
this means that BSS doesn't work as expected. Make the setting conditional
on the SEPARATE_BSS option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:33:24 +08:00
Simon Glass
37c664e825 x86: Make sure the SPL image ends on a suitable boundary
The part of U-Boot that actually ends up in u-boot-nodtb.bin is not built
with any particular alignment. It ends at the start of the BSS section.
The BSS section selects its own alignment, which may larger.
This means that there can be a gap of a few bytes between the image
ending and BSS starting.

Since u-boot.bin is build by joining u-boot-nodtb.bin and u-boot.dtb (with
perhaps some padding for BSS), the expected result is not obtained. U-Boot
uses the end of BSS to find the devicetree, so this means that it cannot
be found.

Add 32-byte alignment of BSS so that the image size is correct and
appending the devicetree will place it at the end of BSS.

Example SPL output without this patch:

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         000142a1  fef40000  fef40000  00001000  2**4
                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
  1 .u_boot_list  000014a4  fef542a8  fef542a8  000152a8  2**3
                  CONTENTS, ALLOC, LOAD, RELOC, DATA
  2 .rodata       0000599c  fef55760  fef55760  00016760  2**5
                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
  3 .data         00000970  fef5b100  fef5b100  0001c100  2**5
                  CONTENTS, ALLOC, LOAD, RELOC, DATA
  4 .binman_sym_table 00000020  fef5ba70  fef5ba70  0001ca70  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .bss          00000060  fef5baa0  fef5baa0  00000000  2**5
                  ALLOC

You can see that .bss is aligned to 2**5 (32 bytes). This is because of
the mallinfo struct in dlmalloc.c:

 17 .bss.current_mallinfo 00000028  00000000  00000000  000004c0  2**5
                  ALLOC

In this case the size of u-boot-spl-nodtb.bin is 0x1ba90. This matches up
with the _image_binary_end symbol:

fef5ba90 g       .binman_sym_table      00000000 _image_binary_end

But BSS starts 16 bytes later, at 0xfef5baa0, due to the 32-byte
alignment. So we must align _image_binary_end to a 32-byte boundary. This
forces the binary size to be 0x1baa0, i.e. ending at the start of bss, as
expected.

Note that gcc reports __BIGGEST_ALIGNMENT__ of 16 on this build, even
though it generates an object file with a member that requests 32-byte
alignment.

The current_mallinfo struct is 40 bytes in size. Increasing the struct to
68 bytes (i.e. just above a 64-byte boundary) does not cause the alignment
to go above 32 bytes. So it seems that 32 bytes is the maximum alignment
at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add more details in the commit message to help people understand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:29:02 +08:00
Simon Glass
b93757caa1 x86: Define the SPL image start
Define this symbol so that we can use binman symbols correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:12 +08:00
Simon Glass
1eeb55755f x86: Add binman symbols to the image
It is useful in SPL and TPL to access symbols from binman, such as the
position and size of an entry in the ROM. Collect these symbols together
in the SPL binaries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:35 +08:00
Simon Glass
d68574a72d x86: Allow 16-bit init to be in TPL
At present we support having 16-bit init be in SPL or U-Boot proper, but
not TPL. Add support for this so that TPL can boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:13 +08:00
Tom Rini
2f41ade79e linker: Modify linker scripts to be more generic
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE.  This lets us re-use the
same script for both SPL and TPL.  Add logic to scripts/Makefile.spl to
pass in the right value when preprocessing the script.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-26 22:55:53 -05:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Simon Glass
3c2dd537c7 x86: Add a link script for SPL
If SPL is used it is always build in 32-bit mode. Add a link script to
handle the correct placement of the sections.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00