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Author SHA1 Message Date
Patrick Delaunay
e70f70aa65 ram: stm32mp1: add driver 
Add driver and binding for stm32mp1 ddr controller and phy

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
 2018-03-19 16:14:21 -04:00
Patrick Delaunay
2514c2d0e6 arm: stm32: add new architecture for STM32MP family 
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
 2018-03-19 16:14:21 -04:00