Commit graph

29983 commits

Author SHA1 Message Date
York Sun
19f9175027 armv8/fsl-lsch3: Fix platform clock calculation
Platform clock is half of platform PLL. There is an additional divisor
in place. Clean up code copied from powerpc.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:55 -07:00
Prabhakar Kushwaha
f3f8c564a1 armv8/ls2085a: Update common header file
ls2085a_common.h contains hard-coded information for NOR/NAND flash,
I2C, DDR, etc. These are platform specific. Move them out of common
header file and placed into respective board header files.

Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector
size.

Enable command auto complete. Update prompt symbol. Set fdt_high to
0xa0000000 because Linux requires that the fdt  be 8-byte aligned
and below 512 MiB. Besides ensuring compliance with the 512 MiB
limit, this avoids problems with the dtb being misaligned within
the FIT image.

Change the MC FW, MC DPL and Debug server NOR addresses in compliance
with the NOR flash layouts for 128MB flash.

Add PCIe macros. Enable "loadb" command. Disable debug server.
Enable workaround for erratum A008511.
Stop reset on panic for postmortem debugging.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
York Sun
060ef09460 armv8/fsl-lsch3: Implement workaround for erratum A008585
Generic Timer may contain an erroneous value. The workaround is to
read it twice until getting the same value.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
Minghuan Lian
5abf13e48a drivers/net/e1000.c: Cleanup whitespace
The patch removes unnecessary whitespace to fix checkpatch's
warning: unnecessary whitespace before a quoted newline

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
Scott Wood
581508bdfb cmd_mem: Store last address/size/etc as ulong
Otherwise the high 32 bits get truncated on 64-bit U-boot.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
York Sun
9f9f009373 driver/ddr/fsl: Add workaround for DDR erratum A008511
This erratum only applies to general purpose DDR controllers in LS2.
It shouldn't be applied to DP-DDR controller. Check DDRC versoin number
before applying workaround.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:54 -07:00
York Sun
4516ff8160 driver/ddr/fsl: Add built-in memory test for DDR4 driver
Add built-in memory test to catch errors after DDR is initialized, before
any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST.
An environmental variable "ddr_bist" is checked before starting test.
It takes a while (several seconds) depending on system memory size.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:53 -07:00
York Sun
6b95be2280 driver/ddr/fsl: Fix driver to support empty first slot
CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:53 -07:00
York Sun
66869f9554 drivers/ddr/fsl: Update DDR driver for DDR4
Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:53 -07:00
York Sun
f8cb101e1e driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
2015-04-23 08:55:53 -07:00
Scott Wood
585acc9de6 nand/fsl_ifc: Increase eccstat[] for IFC 2.0
IFC 2.0 doubled the SRAM size, which means double the number of
ECCSTAT registers.  Fix the resulting array overflow.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:53 -07:00
Prabhakar Kushwaha
45bc6fd108 driver/fsl_ifc: Add support to finalize CS1, CS3 address binding
For fsl-lsch3, IFC is binded with address within 32-bit at fist.
After u-boot relocates to DDR, CS1, CS3 can be binded to higher
address to support large space.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:52 -07:00
Prabhakar Kushwaha
aa66acbf5c board/ls2085_common: Increase malloc length
Increase malloc length for more than 2M.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:52 -07:00
Prabhakar Kushwaha
c517771ae7 driver/ldpaa_eth: Add LDPAA Ethernet driver
LDPAA Ethernet driver is a freescale's new ethernet driver based on
Layerscape architecture.

Every ethernet driver controls on DPNI object. Where all DPNIs share
one common DPBP and DPIO object to support  Rx and Tx flows.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Cristian Sovaiala <cristian.sovaiala@freescale.com>
CC: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
CC: J. German Rivera <German.Rivera@freescale.com>
[York Sun: s/NetReceive/net_process_received_packet]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:17 -07:00
Simon Glass
f3d46bd658 dm: Init device tree as well as driver model in SPL
If enabled, make sure that the device tree is available in SPL before
setting up driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:55 -06:00
Simon Glass
b2b0d3e712 dm: core: Select device tree control correctly for SPL
Some boards will not use device tree for SPL even with driver model. Add
the logic to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:54 -06:00
Simon Glass
1d76bf226a fdt: Allow FDT functions to be built for SPL
Remove the implicit assumption that SPL does not support device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:54 -06:00
Simon Glass
2860f03b91 fdt: Add an option to disable device tree in SPL
Some boards cannot support device tree due to lack of memory. Add an option
to allow these boards to continue to work (and even use driver model).
This is a 'negative' option since most boards are expected to support device
tree in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:54 -06:00
Simon Glass
293f16b1e7 Correct malloc_limit value for pre-relocation malloc()
The limit is measured from the start of the malloc() area and is not an
absolute address. Correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:53 -06:00
Simon Glass
fb5cf7f16b Move initf_malloc() to a common place
To allow this function to be used from SPL, move it to the malloc()
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:53 -06:00
Simon Glass
0879361fd3 fdt: Rename setup_fdt() and make it prepare also
There is little reason to split these two functions. Bring them together
which simplifies the init sequence.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:53 -06:00
Simon Glass
b45122fdf5 fdt: sandbox: Move setup code from board_f to fdtdec
We want to be able to set up the device tree in SPL, so move this code
to a common place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:53 -06:00
Simon Glass
5a87c4174d dm: core: Drop device removal error path when not supported
When CONFIG_DM_DEVICE_REMOVE is not enabled, such as in SPL, we cannot
remove or unbind devices and do not expect to get errors when binding
and probing devices. So drop the error path to reduce code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:52 -06:00
Simon Glass
66312374dc dm: Add a panic_str() function to reduce code size
The printf() in panic() adds about 1.5KB of code size to SPL when compiled
with Thumb-2. Provide a smaller version that does not support printf()-style
arguments and use it in two commonly compiled places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:52 -06:00
Simon Glass
7f9875e733 dm: core: Remove unbind operations when not required
The CONFIG_DM_DEVICE_REMOVE option takes out code related to removing
devices. It should also remove the 'unbind' code since if we cannot
remove we probably don't need to unbind.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:52 -06:00
Simon Glass
36fa61dc61 dm: core: Allow sequence alias support to be removed for SPL
In many cases SPL only uses a single serial port and there is no need for
alias sequence support. We will just use the serial port pointed to by
stdout-path in the /chosen node.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:51 -06:00
Jagannadha Sutradharudu Teki
122d805fd4 Revert "spi: add config option to enable the WP pin function on st micron flashes"
This reverts commit 562f8df18d.

Note: Even un-reverting this patch couldn't works as expected, based
on the latest testing from Heiko Schocher.

Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
2015-04-23 19:53:29 +05:30
Stefan Roese
a8eeaf2f7a cmd_led: Extend led command to support blinking and more leds
This patch extends the U-Boot "led" command to support automatic blinking
by setting a blink frequency in milliseconds. Additionally the number of
supported LEDs is increased to 6 (0...5).

This will be used by the PCA9551 LED driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-23 09:43:08 -04:00
Linus Walleij
ab93bf063b integrator: stop zeroing the gd flags
This assignment conflicts with code that add flags with
gd->flags |= FOO prior to the execution of this function.
Seems like a historical artifact and creates bugs with
early alloc().

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-23 08:52:27 -04:00
Masahiro Yamada
f39ff195af ARM: integrator: move CONFIG_ARCH_CINTEGRATOR to Kconfig
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
2015-04-23 08:52:27 -04:00
Masahiro Yamada
e702146ee5 ARM: integrator: abolish CONFIG_INTEGRATOR
Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
2015-04-23 08:52:27 -04:00
Masahiro Yamada
9ef851f890 ARM: integrator: split board select into AP/CP select and CM select
Select integrator boards by the combination of platform select (AP/CP)
and core module select (CM720T, CM920T, ...).

This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig
much cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
2015-04-23 08:52:27 -04:00
Masahiro Yamada
5cbbd9bd0a ARM: integrator: move board select into mach-integrator/Kconfig
The board/SoC select menu in arch/arm/Kconfig is still cluttered.
Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select
under arch/arm/mach-integrator.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
2015-04-23 08:52:27 -04:00
Masahiro Yamada
526fcc2203 ARM: ARM720t: remove empty asm/arch/hardware.h
arch/arm/cpu/arm720t/start.S includes <asm/arch/hardware.h>,
but the hardware.h headers of ARM720T boards are all empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
2015-04-23 08:52:27 -04:00
Masahiro Yamada
40a39e875c SPDX: add X11 SPDX-License-Identifier
These is a growing trend to license DT files dual GPL and X11
especially in the Linux community.  It allows easier reuse of
device trees for other software projects.

This commit prepares for doing so in U-Boot too, since DT files are
often copied from the kernel to U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-23 08:52:26 -04:00
Masahiro Yamada
4dcd9a65d4 Licenses: fix a typo in README
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-23 08:52:26 -04:00
Linus Walleij
d280ea00ef vexpress64: use DM for all vexpress64 boards
Commit d8bafe1310
"ARMv8: enable DM in vexpress64 board" only enabled DM
for the simulated vexpress64 board (FVP) with the
hardcoded clock value for the simulated board, causing
a console regression on the Juno board which was using
a different clock setting.

Fix this by enabling DM for all vexpress64 boards,
defining the clock frequency per-board, deleting the
static array of PL01x ports from the config file and
relying solely on the port defined in the boardfile
using platform data.

Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-23 08:52:26 -04:00
Hannes Petermaier
e0e3aa50b5 board/BuR/tseries: change pinmux
some pins on the board have been rerouted to other peripherals, so we
change the pinmux to apply with hardware-design.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-04-23 08:52:26 -04:00
Hannes Petermaier
d79c138c75 board/BuR/tseries: reactivate NAND-board
The NAND-version has been become a bit orphan.
Now we need to reactivate it, so bring necessary things:

- loading devicetree
- switch control signal to correct pins
- setup pinmux
- default-environment

up to date.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-04-23 08:52:26 -04:00
Hannes Petermaier
47c14227b8 board/BuR/common: simplify access to devicetree
instead of polling everytime the environment, we take usage of the global
gd->fdt_blob variable and check it only against NULL.

Variable "dtbaddr" from environment is needed only one time on loading the
devicetree within "load_devicetree()"

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-04-23 08:52:22 -04:00
Simon Glass
9694b72442 dm: spi: Correct SPI claim/release_bus() methods
These methods should be passed a slave device, not a bus. This matches the
old SPI interface. It is important to know which device is claiming the bus
so passing a bus is not that useful.

Reported-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-04-23 15:23:45 +05:30
Simon Glass
ab9fd2e83a serial: ns16550: Remove unnecessary init on UART setup
It is not necessary to write a zero baud rate to the device, and for some
chips this will cause problems. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:04:18 -06:00
Simon Glass
363e6da103 dm: ns16550: Support non-byte register spacing with driver model
Allow this driver to support boards where the register shift is not 0.
This fixes some compiler warnings which appear in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:03:48 -06:00
Simon Glass
dd0b0122ba serial: ns16550: Add an option to specify the debug UART register shift
This UART permits different register spacing. To support the debug UART on
devices which have a spacing other than 1 byte, allow the shift value to
be specified.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:03:41 -06:00
Simon Glass
5b5e9ba3f7 exynos: sandbox: ti: Add SPDX license identifiers and notes
For some files I neglected to add a license. Rectify this:

arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
arch/arm/dts/s5pc100-pinctrl.dtsi
arch/arm/dts/s5pc110-pinctrl.dtsi

This file came from Linux and has no license information there, so add a
comment to that effect:

arch/sandbox/include/asm/bitops.h

This file also came from Linux - presumably someone from TI could add the
license:

include/dt-bindings/pinctrl/omap.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Ingrid Viitanen <ingrid.viitanen@nokia.com>
2015-04-22 11:16:26 -06:00
Simon Glass
f9fd4558ea dm: test: Don't clear global_data in dm_test_uclass_before_ready()
We must not clear global_data even in tests, since the ram_buffer (which
is used by malloc()) will also be lost, and subsequent tests will fail.

Zero only the global_data fields that are required for the test to function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-22 11:15:36 -06:00
Simon Glass
98a1605309 dm: Update the README to reflect the current test output
There are a lot more tests now. To avoid confusion add the updated test
output to the driver model README.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-22 11:15:02 -06:00
Simon Glass
093f2dce44 dm: usb: Add a terminator to the string destructor list
The terminator is missing. Add it for completeness.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-22 11:13:24 -06:00
Simon Glass
07d260e047 dm: core: Handle recursive unbinding of uclass devices
Since a device can have children in the same uclass as itself, we need
to handle unbinding carefully: we must allow that unbinding a device in a
uclass may cause another device in the same uclass to be unbound.

Adjust the code to cope.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-22 11:13:17 -06:00
Przemyslaw Marczak
a7b8250210 dm: core: precise comments for get/find device by name
The functions:
- uclass_find_device_by_name()
- uclass_get_device_by_name()
searches the required device for the exactly given name.
This patch, presice this fact for both function's comments.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-22 11:03:16 -06:00