Commit graph

68 commits

Author SHA1 Message Date
Tom Rini
77fdd6d1eb Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2013-12-02 08:38:28 -05:00
York Sun
9a17eb5b7e Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25 11:43:46 -08:00
York Sun
5614e71b49 Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25 11:43:43 -08:00
Masahiro Yamada
5310b8b2a8 nand_spl: trivial refactoring of makefiles
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Prabhakar Kushwaha
0fa934d235 board/p1010rdb:Add NAND boot support using new SPL format
- defines constants
  - Add spl_minimal.c to initialise DDR
  - update TLB entries as per NAND boot
  - remove nand_spl support for P1010RDB

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20 16:09:07 -05:00
Benoît Thébaudeau
da962b7175 nand: mxc: Switch NAND SPL to generic SPL
This also fixes support for mx31pdk and tx25, which had been broken by commit
e05e5de7fa.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-12 07:55:07 +02:00
Tom Rini
0ce033d258 Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end.  We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.

Conflicts:
	arch/arm/cpu/ixp/u-boot.lds
	arch/arm/cpu/u-boot.lds
	arch/arm/lib/Makefile
	board/actux1/u-boot.lds
	board/actux2/u-boot.lds
	board/actux3/u-boot.lds
	board/dvlhost/u-boot.lds
	board/freescale/mx31ads/u-boot.lds
	doc/README.scrapyard
	include/configs/tegra-common.h

Build tested for all of ARM and run-time tested on am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>
2013-03-18 14:37:18 -04:00
Simon Glass
3929fb0a14 Replace __bss_end__ with __bss_end
Note this is a tree-wide change affecting multiple architectures.

At present we use __bss_start, but mostly __bss_end__. This seems
inconsistent and in a number of places __bss_end is used instead.

Change to use __bss_end for the BSS end symbol throughout U-Boot. This
makes it possible to use the asm-generic/sections.h file on all
archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-15 16:13:54 -04:00
Albert ARIBAUD
ef123c5253 Refactor linker-generated arrays
Refactor linker-generated array code so that symbols
which were previously linker-generated are now compiler-
generated. This causes relocation records of type
R_ARM_ABS32 to become R_ARM_RELATIVE, which makes
code which uses LGA able to run before relocation as
well as after.

Note: this affects more than ARM targets, as linker-
lists span possibly all target architectures, notably
PowerPC.

Conflicts:
	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
	arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
	arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
	board/ait/cam_enc_4xx/u-boot-spl.lds
	board/davinci/da8xxevm/u-boot-spl-da850evm.lds
	board/davinci/da8xxevm/u-boot-spl-hawk.lds
	board/vpac270/u-boot-spl.lds

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-03-12 23:28:40 +01:00
Kim Phillips
a6187dccd8 Merge remote-tracking branch 'mpc83xx/next' 2013-01-16 18:34:09 -06:00
Albert ARIBAUD
e05e5de7fa arm: move C runtime setup code in crt0.S
Move all the C runtime setup code from every start.S
in arch/arm into arch/arm/lib/crt0.S. This covers
the code sequence from setting up the initial stack
to calling into board_init_r().

Also, rewrite the C runtime setup and make functions
board_init_*() and relocate_code() behave according to
normal C semantics (no jumping across the C stack any
more, etc).

Some SPL targets had to be touched because they use
start.S explicitly or for some reason; the relevant
maintainers and custodians are cc:ed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-08 22:14:50 +01:00
Scott Wood
22f4442d12 powerpc/mpc83xx: convert MPC8313ERDB to new-SPL
This converts MPC8313ERDB NAND boot to use the new SPL infrastructure.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-12-19 17:45:54 -06:00
Scott Wood
06f60ae3e4 powerpc/mpc83xx: add support for new SPL
This adds arch support for PPC mpc83xx to boot "minimal" (4K) SPLs
using the new infrastructure.

Existing nand_spl targets are updated to deal with the name change
from nand_init.c to spl_minimal.c (as in theory this isn't limited
to NAND anymore).

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-12-19 17:45:44 -06:00
Minkyu Kang
2c601c7208 Merge branch 'master' of git://git.denx.de/u-boot into resolve
Conflicts:
	README
	board/samsung/universal_c210/universal.c
	drivers/misc/Makefile
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/seaboard.h
2012-12-10 14:13:27 +09:00
Andy Fleming
e76cd5d4cf 8xxx: Change all 8*xx_DDR addresses to 8xxx
There were a number of shared files that were using
CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and
several variants (DDR2, DDR3). A recent patchset added
85xx-specific ones to code which was used by 86xx systems.
After reviewing places where these constants were used, and
noting that the type definitions of the pointers assigned to
point to those addresses were the same, the cleanest approach
to fixing this problem was to unify the namespace for the
85xx, 83xx, and 86xx DDR address definitions.

This patch does:

s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g

All 85xx, 86xx, and 83xx have been built with this change.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Tested-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-27 17:45:17 -06:00
Scott Wood
a796e72c78 powerpc/mpc85xx/p1_p2_rdb_pc: convert from nand_spl to new spl
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:26 -06:00
Scott Wood
b9735cbaeb spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.c
There is nothing really NAND-specific about this file.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:24 -06:00
Scott Wood
59629c2897 spl/mpc85xx: move udelay to cpu code
It applies to non-Freescale 85xx boards as well as Freescale boards,
so it doesn't belong in board/freescale.  Plus, it needs to come out
of nand_spl if it's to be used by the new SPL.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:23 -06:00
Scott Wood
8bc50f0b6d powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxx
It's arch code and not a driver, so move it where it belongs.  When it
originally went into drivers/misc there was no 8xxx CPU directory.

This will make new-SPL support a little easier since we can keep the CPU
stuff together and not need to pull stuff in from drivers/misc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:22 -06:00
Scott Wood
a6d0f62a0c nand_spl: fix u-boot.lst breakage
Commit 97b24d3d51 "common: Add symbol
handling for generic lists into Makefile" introduced build errors in many
nand_spl targets, complaining of a missing u-boot.lst.  When not doing an
out-of-tree build, $(obj) expands to nothing, so GCC ended up being given
-I with no argument (or rather, -ansi was the argument).  The failure
didn't show up during a -j1 build because it was picking up the non-SPL
version of u-boot.lst.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-14 10:26:23 +01:00
Stefano Babic
3e4d27b06d Merge git://git.denx.de/u-boot 2012-11-10 08:05:54 +01:00
Stefano Babic
b736e4b929 ARM: Fix start.S when used with SPL in arm1136
This patch modifies start.S for the arm1136 to make it
conform to start.S  in armv7 architecture, to make it
usable if the SPL framework is used.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:58 +02:00
Marek Vasut
8b493a5236 common: Discard the __u_boot_cmd section
The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
556751427b common: Add .u_boot_list into all linker files
Add section for the linker-generated lists into all possible linker
files, so that everyone can easily use these lists. This is mostly
a mechanical adjustment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
97b24d3d51 common: Add symbol handling for generic lists into Makefile
This patch adds essential components for generation of the contents of
the linker section that is used by the linker-generated array. All of
the contents is held in a separate file, u-boot.lst, which is generated
at runtime just before U-Boot is linked.

The purpose of this code is to especially generate the appropriate
boundary symbols around each subsection in the section carrying the
linker-generated arrays. Obviously, the interim linker code for actual
placement of the variables into the section is generated too. The
generated file, u-boot.lst, is included into u-boot.lds via the linker
INCLUDE directive in u-boot.lds .

Adjustments are made in the Makefile and spl/Makefile so that the
u-boot.lds and u-boot-spl.lds depend on their respective .lst files.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Joe Hershberger <joe.hershberger@ni.com>
2012-10-22 08:29:29 -07:00
Matthew McClintock
ae6beb24d7 nand_spl: change out_be32 to raw_writel and depend on subsequent sync
This change reduces the SPL size by removing the redundant syncs produced
by out_be32 and just replies on one final sync

Done with:

sed -r '/in_be32/b; s/(out_be32)\(([^,]*),\s+(.*)\)/__raw_writel(\3, \2)/g' -i `git grep --name-only sdram_init nand_spl/`

Signed-off-by: Matthew McClintock <msm@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:17 -05:00
Matthew McClintock
02ea538ce9 nand_spl: p1023rds: wait before enabling DDR controller
We have a requirement to wait a period of time before enabling the
DDR controller

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:17 -05:00
Matthew McClintock
8c454047fe nand_spl: update udelay for Freescale boards
Let's use the more appropriate udelay for the nand_spl. While we
can't make use of u-boot's full udelay we can atl east use a for
loop that won't get optimized away .Since we have the bus clock
we can use the timebase to calculate wall time.

Looked at reusing the u-boot udelay functions but it pulls in a lot
of code and would require quite a bit of work to keep us within the
very small space constrains we currently have

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:17 -05:00
Matthew McClintock
abbe536ebc powerpc/p1010rdb: nandboot: compare SVR properly
We were not comparing the SVRs properly previously. This comparison
will properly shift the SVR and mask off the E bit

This fixes the boot output to show the correct DDR bus width:

512 MiB (DDR3, 16-bit, CL=5, ECC off)

instead of

512 MiB (DDR3, 32-bit, CL=5, ECC off)

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:17 -05:00
Matthew McClintock
9c6b47d53e p1014rdb: set ddr bus width properly depending on SVR
Currently, for NAND boot for the P1010/4RDB we hard code the DDR
configuration. We can still dynamically set the DDR bus width in
the nand spl so the P1010/4RDB boards can boot from the same
u-boot image

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:16 -05:00
Wolfgang Denk
1fed668b3f Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/p3060: Add SoC related support for P3060 platform
  powerpc/85xx: Add support for setting up RAID engine liodns on P5020
  powerpc/85xx: Refactor some defines out of corenet_ds.h
  fm-eth: Add ability for board code to disable a port
  powerpc/mpc8548: Add workaround for erratum NMG_LBC103
  powerpc/mpc8548: Add workaround for erratum NMG_DDR120
  powerpc/mpc85xxcds: Fix PCI speed
  powerpc/mpc8548cds: Fix booting message
  powerpc/p4080: Add support for secure boot flow
  powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
  powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
  powerpc/p2041rdb: remove watch dog related codes
  powerpc/p2041rdb: updated description of cpld command
  powerpc/p2041rdb: add more ddr frequencies support
  powerpc/p2041rdb: set sysclk according to status of physical switch SW1
  powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
  powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc8xxx: Add DDR2 to unified DDR driver
  powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
  powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
  powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
  powerpc/85xx: Refactor P2041RDB to use common p_corenet files
  powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
  powerpc/85xx: Enable CMD_REGINFO on corenet boards
  powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
  powerpc/85xx: Fix USB protocol definitions for P1020RDB
  powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
  powerpc/mpc8xxx: Move DDR RCW overriding to common code
  powerpc/mpc8xxx: Extend CWL table
  powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
  powerpc/85xx: Cleanup extern in corenet_ds board code
  powerpc/p2041rdb: Add ethernet support on P2041RDB board
  powerpc/85xx: Add networking support to P1023RDS
  powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
  powerpc/85xx: Add FMan ethernet support to P4080DS
  powerpc/85xx: Add support for FMan ethernet in Independent mode
  powerpc/mpc8548cds: Cleanup mpc8548cds.c
  powerpc/mp: add support for discontiguous cores
  powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
  fdt: Add new fdt_create_phandle helper
  fdt: Rename fdt_create_phandle to fdt_set_phandle
  powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
  fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
  powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
  fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
  powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
  powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
  nand: Freescale Integrated Flash Controller NAND support
  powerpc/85xx: Add basic support for P1010RDB
  powerpc/85xx: Add support for new P102x/P2020 RDB style boards
  powerpc/85xx: relocate CCSR before creating the initial RAM area
  powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
  powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
  powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
2011-10-04 22:08:13 +02:00
Fabio Estevam
29b62c012d MX31: mx31pdk: Remove nand_spl config.mk file
No need to have a config.mk to only store a single line.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-09-30 22:00:59 +02:00
Dipen Dudhat
d793e5a840 powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
And various defines to enable NAND support and NAND spl code for the
P1010RDB platform.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Li Yang
14aa71e660 powerpc/85xx: Add support for new P102x/P2020 RDB style boards
The following boards share a common design but with minor variations
between them:

P1020MSBG-PC
P1020RDB-PC
P1020UTM-PC
P1021RDB-PC
P1024RDB
P1025RDB
P2020RDB-PC

The P1020RDB-PC shares its roots in the existing P1020RDB board design,
however uses DDR3 instead of DDR2.
P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK.

Key features on these boards include:
* DDR3
* NOR flash
* NAND flash (on RDB's only)
* SPI flash (on RDB's only)
* SDHC/MMC card slot
* VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
* PCIE slot and mini-PCIE slots

As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
is used to store SPD data. In case of absent or corrupted SPD, falling back
to timing data embedded in the source code will be used. Raw timing data is
extracted from DDR chip datasheet. Different speeds of DDR are supported
with this approach. ODT option is forced to fit this set of boards, again
because they don't have regular DIMMs.

CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet
specification for writing timing.

VSC firmware Address is defined by default in config file for eTSEC1.

SD width is based off DIP switch. DIP switch is detected on the
board by reading i2c bus and setting the appropriate mux values.

Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC
have pins multiplexing. QE function needs to be disabled to access Nor Flash
and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below

'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Zhao Chenhui <b26998@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: ramneek.mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Akhil Goyal <akhil.goyal@freescale.com>
2011-09-29 19:01:04 -05:00
Aneesh V
401bb30b6d replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:34 +02:00
Roy Zang
3f7f6b8592 powerpc/85xx: Add basic support for P1023RDS board
The P1023RDS board is the reference board for the P1023 SoC.

Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Stefano Babic
7f5b2bb79b MX31: mx31pdk: fix nand_spl
Commit f326cbba98 breaks mx31pdk,
as the _end section in u-boot.lds is missing for the nand_spl
production.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-04-27 19:38:07 +02:00
Dipen Dudhat
e1f703810e powerpc/85xx: Modify NAND loader makefiles to compile NAND_SPL linker script
Modify eLBC based platform's NAND loader Makefile to preprocess nand loader
linker script and then use it.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-15 15:57:32 -05:00
Wolfgang Denk
3b258e2e58 Fix build issues cause by LDFLAGS_FINAL changes
Commit 6dc1ece "Introduce a new linker flag LDFLAGS_FINAL" modified a
number of Makefiles in a way that broke out-of-tree builds.  The
problem was that $(nandobj) was used before it got defined.

Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-03-31 23:38:16 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Haiying Wang
6dc1eceb9c Introduce a new linker flag LDFLAGS_FINAL
commit 8aba9dceeb
Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS

breaks the usage of --gc-section to build nand_spl. We still need linker option
--gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes
the --gc-sections to each uboot image.

To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace
PLATFORM_LDFLAGS in the Makefile of each nand_spl board.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2011-03-22 23:32:06 +01:00
Fabio Estevam
ed3df72db1 mx31pdk: Use the new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:54 +01:00
Kumar Gala
cb14e93b55 powerpc/85xx: Add support for booting from NAND on MPC8572DS
Mimic support that exists on MPC8536DS on the MPC8572DS to allow booting
from NAND.

Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:18 -06:00
Joakim Tjernlund
ee0270dff7 PowerPC, nand_spl: Add relocation support for -fpic
By rearranging the linker script we get support for
relocation of -fpic for free.
Move __got2_entries outside _GOT2_TABLE_ defining scope
matching the rest of PowerPC

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2010-12-17 20:25:19 +01:00
Scott Wood
97a85b223a powerpc/nand spl: link libgcc
Recent GCC (4.4+) performs out-of-line epilogues in some cases, when
optimizing for size.  It causes a link error for _restgpr_30_x (and similar)
if libgcc is not linked.

It actually increases size with very small binaries, due to the fixed size
of the out-of-line code, and not having any functions that actually need to
restore more than 2 or 3 registers.  But I don't see a way to turn it off,
other than asking GCC to optimize for speed -- which may also increase
size for some boards.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-12-16 23:19:14 +01:00
Wolfgang Denk
ff2311ab5d 83xx: Cleanup for partial linking and --gc-sections
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Haiying Wang <r54964@freescale.com>
2010-11-27 23:35:09 +01:00
Scott Wood
f1c574d400 83xx: Fix NAND_SPL link address
Apply the same fix for 83xx as was done for 85xx in commit
96196a1f75.

Without this, NAND SPLs are built with the text base intended for the main
image, resulting in a broken, very large u-boot-nand.bin.

The block of defines for NAND boot is moved closer to where
CONFIG_SYS_TEXT_BASE is defined.  We can't directly use
CONFIG_SYS_NAND_U_BOOT_DST in the definition of CONFIG_SYS_TEXT_BASE because
autoconf.mk will include the literal text "CONFIG_SYS_NAND_U_BOOT_DST",
but at least keep them close and point out that they're supposed to be
the same.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-11-27 23:35:08 +01:00
Haiying Wang
96196a1f75 powerpc/85xx: add CONFIG_SYS_TEXT_BASE_SPL for 85xx nand spl build
Introduce a SPL specific CONFIG_SYS_TEXT_BASE_SPL define to be used by
the linker.  This has similiar semantics to CONFIG_SYS_TEXT_BASE however
since SPL is a unqiue image we introduce a new variable to control its
text base address.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-11-12 08:51:36 -06:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00