This adds support for reading the battery-backed memory present on these
RTCs. This modifies the read/write methods to access the RAM instead of
raw register offsets. No one was using these in-tree, so we should be
fine changing them.
We use the "standard" address space window to access the RAM. The
extension RAM address register has some reserved bits, but we write the
whole thing for simplicity (as these bits default to 0).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This is a basic driver for the ultra-low-power Abracon AB x80x series
of RTC chips. It supports in particular, the supersets AB0805 and AB1805.
It allows reading and writing the time, and enables the supercapacitor or
battery charger.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
