Commit graph

64 commits

Author SHA1 Message Date
Michal Simek
be6f6af1d6 ARM64: zynqmp: Add initial support for the first silicon
Add basic configuration for the first silicon.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Michal Simek
0785dfd8a7 ARM64: zynqmp: Use the same U-Boot version with/without ATF
Remove SECURE_IOU option which is not needed. U-Boot itself can detect
which EL level it is on and based on that use do platform setup.
It also simplify usage because one Kconfig entry is gone.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:56 +01:00
Michal Simek
a7bcd4c32a zynqmp: mp: Add support for booting R5 from any address
Put jump trampoline to TCM at 0 and setup R5 reset address to 0.
Jump trampoline ensures that jump to the right location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19 10:42:45 +01:00
Siva Durga Prasad Paladugu
16fa00a711 zynqmp: usb: Add usb dwc3 driver support for zynqmp
Added usb dwc3 driver support for zynqmp
this also supports the DFU and LTHOR to download
the linux images on to RAM and cen be booted from
those linux images.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-08-19 11:27:30 +02:00
Michal Simek
37ecd04fe3 ARM: zynqmp: Add platform specific arch_get_page_table
Based on the patch:
"armv8: caches: Added routine to set non cacheable region"
(sha1: dad17fd510)
it is necessary to add platform specific hook.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-08-19 11:25:50 +02:00
Michal Simek
cb526c1c88 zynqmp: Enable U-Boot run in EL3
Enable Secure IOU setup to enable U-Boot to run in EL3 without
setting from ATF.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-08-19 11:23:13 +02:00
Michal Simek
225bf9aa65 zynqmp: Add support for IP detection via SLCR
SLCR can be used for IP configuration setting.
Add SLCR skeleton to enable run time checking.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Michal Simek
fb101168fa zynqmp: mp: Simplify set_r5_start handling
Pass directly boot_addr which is LOVEC (0) or HIVEC (0xffff0000).
No reason to use magic values 0 and 1.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Siva Durga Prasad Paladugu
0b54a9dd09 zynqmp: Define ep config for ZynqMP
Define a new config "zynqmp_ep" for ZynqMP instead
of xilinx_zynqmp. This defconfig supports all emulation
platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP
to ARCH_ZYNQMP.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Siva Durga Prasad Paladugu
7558000721 zynqmp: Kconfig: Move zynqmp Kconfig
Move the zynqmp Kconfig from board to arch
as there may be different boards under same
architecture.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Michal Simek
16247d28d5 zynqmp: Add support for emulation platform - Veloce
Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:03 +02:00
Michal Simek
5cb2420037 zynqmp: Add support for R5 sw loading
Add support for loading sw for R5 with enabling for zynqmp.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-04-29 11:19:03 +02:00
Siva Durga Prasad Paladugu
222b212937 zynqmp: caches: Enable dcache for zynqmp
Define the mmu table till 2MB granularity
enable dcaches for zynqmp.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:02 +02:00
Michal Simek
84c7204bd1 arm64: Add Xilinx ZynqMP support
Add basic Xilinx ZynqMP arm64 support.
Serial and SD is supported.
It supports emulation platfrom ep108 and QEMU.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-02 18:41:54 +01:00