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4257 commits

Author SHA1 Message Date
Paul Gortmaker
dd9ca98f26 sbc8548: reclaim wasted sector in boot flash
By nature of being based off the MPC8548CDS board, this
board inherited an ENV_SIZE setting of 256k.  But since
it has a smaller flash device (8MB soldered on), it has
a native sector size of 128k, and hence the ENV_SIZE was
causing 2 sectors to be used for the environment.

By removing the unused sector, we can push TEXT_BASE up
closer to the end of address space and reclaim that
sector for any other application.  This also fixes the
mismatch between TEXT_BASE and MONITOR_LEN reported by
Kumar earlier.

Since this board also supports the ability to boot off
the 64MB SODIMM flash, this change is forward looking
with that in mind; i.e. the settings for MONITOR_LEN
and ENV_SIZE will work when the 512k sectors of the
SODIMM flash are used for alternate boot in the future.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30 08:29:47 -05:00
Kumar Gala
8280912e06 ppc/85xx: Clean up immap_85xx.h
* Converted all white space to tabs
* Converted all types to u8/u16/u32
* Reduce lines to fit in 80 columns
* Renamed MPC85xx_{Q,B}MAN -> FSL_CORENET_{Q,B}MAN

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-28 22:35:58 -05:00
Heiko Schocher
3887c3fbdb mucmc52, uc101: delete ata@3a00 node, if no CF card is detected
U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-09-25 01:22:13 +02:00
Heiko Schocher
7f625fc6d3 mpc5200, mucmc52, uc101: config cleanup
- As these boards are similiar, collect common config options
  in manroland/common.h and manroland/mpc52xx-common.h
  for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment

Signed-off-by: Heiko Schocher <hs@denx.de>

Minor edit of commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 01:19:17 +02:00
Wolfgang Denk
9d142ea8f7 Fix "ppc/85xx: Clean up use of LAWAR defines" breakage
Commit 002741ae86 modified include/asm-ppc/mmu.h such that the LAWAR_
defines were only enabled for the 83xx platform, but they are also
needed on MPC512x system. Enabling these for E300 systems seems thus
more appropriate.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 01:02:52 +02:00
Martha M Stan
a5aa3998ab Add Elpida Memory Configuration to mpc5121ads Boards
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 00:45:38 +02:00
Martha M Stan
054197ba8e mpc512x: Streamlined fixed_sdram() init sequence.
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor cleanup:

Re-ordered default_mddrc_config[] to have matching indices.

This allows to use the same index "N" for source and target fields;
before, we had code like this

	out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);

which always looked like a copy & paste error because 2 != 3.

Also, use NULL when meaning a null pointer.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25 00:45:30 +02:00
Wolfgang Denk
5e498dfab8 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-09-24 23:40:25 +02:00
Kumar Gala
39aaca1f66 ppc/p4080: Determine various chip frequencies on CoreNet platforms
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms.  Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks.  We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:29 -05:00
Kumar Gala
7e4259bba4 ppc/p4080: Add various p4080 related defines (and p4040)
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:28 -05:00
Kumar Gala
418ec85843 ppc/p4080: Add support for CoreNet style platform LAWs
On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address.  Also, the target IDs
on CoreNet platforms have been completely re-assigned.

Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet style boot release code since it will need
to determine what the target ID should be set to for boot window
translation.

Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
it elsewhere.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:28 -05:00
Kumar Gala
01df521217 ppc/p4080: Add p4080 platform immap definitions
The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform.  We reuse the 85xx immap and just add new definitions for
local access and global utils.  The global utils is now broken into
global utils, clocking and run control/power management.

The offsets from CCSR for a number of blocks have also changed.  We
introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
platform from the new p4080 platform.  We don't use QoirQ as there are
products (like p2020) that are PQ3 based platforms but have the QoirQ
name.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:27 -05:00
Mingkai Hu
266139b88b immap_85xx: add porpllsr's plat ratio definition
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:26 -05:00
Paul Gortmaker
928435d11b sbc85x0: tidy up Makefile to use new configuration script.
Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the boards config header.  This takes advantage of
that for the sbc8540/sbc8560 boards.

There were a couple of cheezy comments pointing at incorrect
files, or files that don't exist, so I've cleaned those up too.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:00 -05:00
Paul Gortmaker
2738bc8df6 sbc8548: allow enabling PCI via a make config option
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, and if you had 33MHz PCI, you
had to manually change CONFIG_SYS_NS16550_CLK too, which was
not real user friendly,

This adds the typical PCI and clock speed make targets to the
toplevel Makefile in accordance with what is being done with
other boards (i.e. using the "-t" to mkconfig).

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:00 -05:00
Paul Gortmaker
fdc7eb90b5 sbc8548: update PCI/PCI-e support code
The PCI/PCI-e support for the sbc8548 was based on an earlier
version of what the MPC8548CDS board was using, and in its
current state it won't even compile.  This re-syncs it to match
the latest codebase and makes use of the new shared PCI functions
to reduce board duplication.

It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O
back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and
similarly it coalesces the PCI and PCI-e mem into one single TLB.

Both PCI-x and PCI-e have been tested with intel e1000 cards
under linux (with an accompanying dts change in place)

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:00 -05:00
Paul Gortmaker
a8b3e90f79 fsl_pci: create a SET_STD_PCI_INFO() helper wrapper
Recycle the recently added PCI-e wrapper used to reduce board
duplication of code by creating a similar version for plain PCI.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:00 -05:00
Paul Gortmaker
11d5a629f8 sbc8548: correct local bus SDRAM size from 64M to 128M
The size of the LB SDRAM on this board is 128MB, spanning CS3
and CS4.  It was previously only being configured for 64MB on
CS3, since that was what the original codebase of the MPC8548CDS
had.  In addition to setting up BR4/OR4, this also adds the TLB
entry for the second half of the SDRAM.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:00 -05:00
Paul Gortmaker
9b3ba24f18 sbc8548: enable access to second bank of flash
The sbc8548 has a 64MB SODIMM flash module off of CS6 that
previously wasn't enumerated by u-boot.  There were already
BR6/OR6 settings for it [used by cpu_init_f()] but there
was no TLB entry and it wasn't in the list of flash banks
reported to u-boot.

The location of the 64MB flash is "pulled back" 8MB from
a 64MB boundary, in order to allow address space for the
8MB boot flash that is at the end of 32 bit address space.
This means creating two 4MB TLB entries for the 8MB chunk,
and then expanding the original boot flash entry to 64MB
in order to cover the 8MB boot flash and the remainder
(56MB) of the user flash.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:05:00 -05:00
Paul Gortmaker
7b1f1399e8 sbc8548: delete unused MPC8548CDS info carried over from port
There are a couple defines and PCI bridge quirks related to the PCI
backplane of the MPC8548CDS that have no meaning in the context of
the port to the sbc8548 board, so delete them.

Also, the form factor of the sbc8548 is a standalone board with a
single PCI-X and a single PCI-e slot.  That pretty much guarantees
that it will never be a PCI agent itself, so the host/agent and root
complex/end node distinctions have been removed.

Similarly, since there is no physical connector mapping to PCI2, so
all references of PCI2 in the board support files have been removed
as well.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:59 -05:00
Kumar Gala
002741ae86 ppc/85xx: Clean up use of LAWAR defines
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
62ca21c442 ppc/85xx: Simplify the top makefile for P1_P2_RDB boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Kumar Gala
a0f9e0e0f0 ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:57 -05:00
Kumar Gala
f9edcc10e6 ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:57 -05:00
Mingkai Hu
0e905ac28b ppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:57 -05:00
Kumar Gala
202d94875c ppc/85xx: Fix LCRR_CLKDIV defines
For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.

All 83xx and early (e500v1) PQ3 devices support:
 clk/2: CLKDIV = 2
 clk/4: CLKDIV = 4
 clk/8: CLKDIV = 8

Newer PQ3 (e500v2) and MPC86xx support:
 clk/4: CLKDIV = 2
 clk/8: CLKDIV = 4
 clk/16: CLKDIV = 8

Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
2009-09-24 12:04:57 -05:00
Eric Millbrandt
71ce9bd7f5 galaxy5200: enable version environment variable
Add version environment variable configuration to the galaxy5200
board header file.

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-24 00:23:05 +02:00
Werner Pfister
c569ad6e1e digsy_mtc: Add TCR register value for RTC (DS1339)
Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-09-24 00:21:06 +02:00
Wolfgang Denk
1c19863fa2 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-09-24 00:17:17 +02:00
Dirk Eibach
91d599044c ppc4xx: Make DDR2 timing for intip more robust
DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-23 15:46:02 +02:00
Peter Tyser
004eca0c9b ppc: Clean up calling of phy_reset() during init
Remove board-specific #ifdefs for calling phy_reset() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-09-22 23:05:29 +02:00
Peter Tyser
3a8f28d0a6 ppc: Clean up calling of misc_init_r() during init
Remove board-specific #ifdefs for calling misc_init_r() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-09-22 23:04:44 +02:00
Peter Tyser
3202d33169 Remove deprecated 'autoscr' command/variables
The more standard 'source' command provides identical functionality to
the autoscr command.

Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.

The 'autoscript' and 'autoscript_uname' environment variables are
also removed.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-09-22 23:03:24 +02:00
Marcel Ziswiler
b55ae40249 FDT: remove obsolete OF_CPU and OF_SOC macros.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-09-22 22:59:27 +02:00
Wolfgang Denk
3dc5e00454 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-09-17 23:28:31 +02:00
Simon Kagstrom
0413cfecea Correct ffs/fls regression for PowerPC etc
Commits

  02f99901ed
  52d61227b6

introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
2009-09-17 22:45:31 +02:00
Stefan Roese
84a45d33c2 ppc4xx: Enable commands for FDT enabled Linux booting on AMCC Acadia
Acadia still used the "old" arch/ppc bootm commands for booting
Linux images without FDT. This patch now enables these fdt-aware
boot commands for Acadia as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-17 14:08:26 +02:00
Mingkai Hu
6e1385d5f8 NAND boot: change NAND loader's relocate SP to CONFIG param
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:09 -05:00
Kumar Gala
206af3527c ppc/85xx: Repack tlb_table to save space
We can pack the initial tlb_table in MAS register format and use
write_tlb to set things up.  This savings can be helpful for NAND
style first stage boot loaders.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:09 -05:00
Kumar Gala
d30f904353 ppc/85xx: Introduce low level write_tlb function
Factor out the code we use to actually write a tlb entry.

set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:08 -05:00
Roy Zang
0ead6f2ed7 ppc/85xx: Enable usb ehci support for p2020ds board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-15 21:30:08 -05:00
Scott Wood
dcc87dd58d ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.
Its reset value is random, and we sometimes read uninitialized TLB
arrays.  Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-09-15 21:30:08 -05:00
Marcel Ziswiler
3ca55bce9c mpc8260: remove Ethernet node fixup to use generic FDT code.
Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
configs for the common mpc8260 code to use generic Ethernet fixup.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-09-15 23:01:15 +02:00
Simon Kagstrom
a6e19d69f6 arm: Define test_and_set_bit and test_and_clear bit for ARM
Needed for (e.g.) ubifs support to work.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:35:20 +02:00
Simon Kagstrom
52d61227b6 Define ffs/fls for all architectures
UBIFS requires fls(), which is not defined for arm (and some other
architectures) and this patch adds it. The implementation is taken from
Linux and is generic. ffs() is also defined for those that miss it.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:34:32 +02:00
Simon Kagstrom
4b15de08fe arm: Make arm bitops endianness-independent
Bring over the bitop implementations from the Linux
include/asm-generic/bitops/non-atomic.h to provide
endianness-independence.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:34:04 +02:00
Simon Kagstrom
02f99901ed Move __set/clear_bit from ubifs.h to bitops.h
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:31:24 +02:00
Wolfgang Denk
041a6a0c2e Merge branch 'master' of git://git.denx.de/u-boot-microblaze 2009-09-15 21:45:50 +02:00
Michal Simek
0900bee9ab microblaze: Enable hush parser
With Hush parser is possible to change command line in dtb

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-09-14 14:40:04 +02:00
Michal Simek
13916abf99 microblaze: Remove AtmarkTechno Suzaku board
Users should use microblaze-generic platform.
This platform is longer not supported.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-09-14 14:40:04 +02:00