Commit graph

86900 commits

Author SHA1 Message Date
Tom Rini
7eac2e46ec configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-18 16:05:49 -04:00
Tom Rini
51148de673 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-usb into next
- USB and SPL related Kconfig clean-up / re-organization
2023-05-18 14:02:39 -04:00
Wadim Egorov
14421e875e configs: phycore-rk3288: Enable CONFIG_LTO
The phycore-rk3288 SPL binary is reaching the limits of 32KB very often.
Enable CONFIG_LTO to reduce the size of the SPL and make the board more
future proof for changes increasing the SPL size.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 09:15:52 +08:00
Wolfgang Zarre
63a49240d4 rockchip: Pinebook Pro: Fix emmc default configuration
If u-boot is installed on the internal emmc, then this will
allow to boot without failure.

Signed-off-by: Wolfgang Zarre <lxdev12@zirdeon.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:58:16 +08:00
Jonas Karlman
61ff869fd2 rockchip: rk3588-rock-5b: Add bootph prop to pinctrl for uart2 and sdhci
Enable pinctrl for sdhci in SPL to support loading of FIT image from SD
and eMMC storage when booting from SPI NOR flash.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:05 +08:00
Jonas Karlman
ec48bcf48c rockchip: rk3588-rock-5b: Update defconfig
Update defconfig for rk3588-rock-5b with new defaults.

Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.

Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.

Add config option to include useful gpio cmd.

Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.

Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:05 +08:00
Jonas Karlman
6fb02589a6 rockchip: rk3588-evb: Update defconfig
Update defconfig for rk3588-evb with new defaults.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.

Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.

Add config options to include useful gpio and regulator cmd.

Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.

Remove CONFIG_DEBUG_UART_ANNOUNCE=y to remove debug messages.

Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:05 +08:00
Jonas Karlman
153c87be48 rockchip: rk3588: Select DM_RESET and DM_REGULATOR_FIXED in arch Kconfig
Like other Rockchip SoCs, DM_RESET and DM_REGULATOR_FIXED is useful
across RK3588 platform. Select them from arch Kconfig.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:05 +08:00
Jonas Karlman
64f79f88a7 rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 3 Model A.

Unlike prior generation SoCs the BootRom in RK3568 can read all data and
look for idbloader at 0x8000, same as on SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The
FIT image is loaded from 0x60000.

  => sf probe
  SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1384448 bytes read in 119 ms (11.1 MiB/s)

  => sf update $fileaddr 0 $filesize
  device 0 offset 0x0, size 0x152000
  1179648 bytes written, 204800 bytes skipped in 9.901s, speed 143185 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:05 +08:00
Jonas Karlman
674803fe86 rockchip: rk3568-rock-3a: Use pinctrl for sdmmc and sdhci in SPL
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT
image from SD and eMMC storage when booting from SPI NOR flash.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
68000f750a rockchip: rk3568-rock-3a: Update defconfig
Update defconfig for rk3568-rock-3a with new defaults.

Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.

Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.

Add config option to include useful gpio cmd.

Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.

Filter out assigned-clock props with CONFIG_OF_SPL_REMOVE_PROPS,
U-Boot proper will read and configure assigned-clock props.

Remove the CONFIG_SPL_PMIC_RK8XX=y option, the pmic is not used in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
703c170b40 rockchip: rk3568-evb: Update defconfig
Update defconfig for rk3568-evb with new defaults.

Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.

Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.

Add config options to include useful gpio, i2c, pmic and regulator cmd.

Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.

Filter out assigned-clock props with CONFIG_OF_SPL_REMOVE_PROPS,
U-Boot proper will read and configure assigned-clock props.

Add config options to enable support for the RK809 PMIC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
41cb87be06 rockchip: rk3566-radxa-cm3-io: Use pinctrl for sdmmc and sdhci in SPL
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT
image from SD and eMMC storage when booting from SPI NOR flash.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
1bf49d5a4a rockchip: rk3566-radxa-cm3-io: Update defconfig
Update defconfig for rk3566-radxa-cm3-io with new defaults. Also add
missing supported mmc modes to sdhci node.

Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.

Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded
to 0x40000, use the space in between as SPL_MAX_SIZE.

Add config option to include useful gpio cmd.

Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is
set based on cpuid read from OTP.

Filter out assigned-clock props with CONFIG_OF_SPL_REMOVE_PROPS,
U-Boot proper will read and configure assigned-clock props.

Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
dc27b4a1af rockchip: rk356x-u-boot: Add xin24m clock node to SPL
Add bootph-all prop to xin24m clock node, it is referenced by cru node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
f02cbff67d spi: rockchip_sfc: Use linux rockchip,sfc-no-dma prop
Use the same prop as linux to control the use of fifo or dma mode. Also
add a u-boot,spl-sfc-no-dma prop to control the same in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Eugen Hristev
6832810814 configs: rock5b-rk3588: add PCI drivers and command
Add drivers for PCIe , phy, and command.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Christopher Obbard
bfbef68ae1 ARM: dts: rockchip: rock5b: enable pcie2x1l2 and associated combphy
Enable the PCIe 2x1l 2 device and associated combphy.
On this bus, the Rock5B has an Ethernet transceiver connected.

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
[eugen.hristev@collabora.com: minor tweaks]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: add PCIe pins]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Joseph Chen
ec8242cceb ARM: dts: rockchip: rk3588s-u-boot: add pcie2x1l2 with PHY
Add the node for PCIe 2x1l 2 device together with the corresponding
combphy.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[eugen.hristev@collabora.com: moved to -u-boot.dtsi, minor
adaptations]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: adapt to kernel node]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
5713135ecc rockchip: rockpro64: Build u-boot-rockchip-spi.bin
Enable CONFIG_ROCKCHIP_SPI_IMAGE to build u-boot-rockchip-spi.bin.
Define CONFIG_SYS_SPI_U_BOOT_OFFS to write u-boot.itb at the expected
offset. Enable CONFIG_LTO to reduce size of SPL so that the mkimage
output fit before the 0x60000 offset in u-boot-rockchip-spi.bin.

  => sf probe
  SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1442304 bytes read in 27 ms (50.9 MiB/s)
  => sf update $fileaddr 0 $filesize
  device 0 offset 0x0, size 0x160200
  1421824 bytes written, 20480 bytes skipped in 9.501s, speed 155432 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
6e2b8344d6 rockchip: rock-pi-4: Use SDMA to boost eMMC performance
Enable the use of SDMA mode to boost eMMC performance on ROCK Pi 4.
Also add missing flags to indicate the supported MMC modes.

Using mmc read command to read 32 MiB data shows following improvement:

  => time mmc read 10000000 2000 10000

Before: time: 3.178 seconds
After: time: 0.402 seconds

This also enables CONFIG_SPL_FIT_SIGNATURE option to help discover
any possible future issue with loading TF-A into DRAM/SRAM.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:44:04 +08:00
Jonas Karlman
cf777572ca rockchip: rockpro64: Use SDMA to boost eMMC performance
Enable the use of SDMA mode to boost eMMC performance on RockPro64.
Also add missing flags to indicate the supported MMC modes.

Using mmc read command to read 32 MiB data shows following improvement:

  => time mmc read 10000000 2000 10000

Before: time: 3.178 seconds
After: time: 0.402 seconds

This also enables CONFIG_SPL_FIT_SIGNATURE option to help discover
any possible future issue with loading TF-A into DRAM/SRAM.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-18 08:34:45 +08:00
Jonas Karlman
3b804b370d mmc: rockchip_sdhci: Disable DMA mode using a device tree property
Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399
similar to other Rockchip SoCs. Checksum validation fails with:

  ## Checking hash(es) for Image atf-2 ... sha256 error!
  Bad hash value for 'hash' hash node in 'atf-2' image node
  spl_load_simple_fit: can't load image loadables index 1 (ret = -1)
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

Add a device tree property, u-boot,spl-fifo-mode, to control when the
rockchip_sdhci driver should disable the use of DMA and fallback on PIO
mode. Same device tree property is used by the rockchip_dw_mmc driver.

In commit 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") the DMA mode was disabled using a CONFIG
option on RK3588. Revert that and instead disable DMA using the device
tree property for all RK3588 boards, also apply similar workaround for
all RK3399 boards.

Fixes: 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Quentin Schulz <foss+uboot@0leil.net> # RK3399 Puma, RK3588 Tiger
2023-05-18 08:34:45 +08:00
Jonas Karlman
41fc80b8da mmc: rockchip_sdhci: Skip blocks read workaround on RK3399
The workaround to limit number of blocks to read in a single command
should only be applied to RK3568 and RK3588. Change to be more strict
when to apply the workaround.

Fixes: 2cc6cde647 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Quentin Schulz <foss+uboot@0leil.net> # RK3399 Puma, RK3588 Tiger
2023-05-18 08:34:45 +08:00
Jon Lin
c5b4a012bc phy: rockchip: naneng-combphy: Support rk3588
Add support for rk3588 phy variant.
The PHY clock is fixed at 100MHz.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
[kever.yang@rock-chips.com: update pcie pll parameters]
Co-developed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[eugen.hristev@collabora.com: squashed, tidy up]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
d49dc884cb phy: rockchip: naneng-combphy: Add support for multiple resets
Some variants of the PHY have more than just one reset.
To cover all cases, request the rests in bulk rather than just
the reset at index 0.

Co-developed-by: Ren Jianing <jianing.ren@rock-chips.com>
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-17 17:36:18 +08:00
Jon Lin
014a31907a pci: pcie_dw_rockchip: Support max_link_speed dts property
Add support for max_link_speed specified in the PCI DT binding.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
[eugen.hristev@collabora.com: port to latest API, set default correctly,
align to 80 chars]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: switch to dev_read_u32_default]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-17 17:36:18 +08:00
Jon Lin
5374480395 pci: pcie_dw_rockchip: Add rk3588 compatible
Add compatible for RK3588 SoC.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
bb52f1c604 reset: rockchip: implement rk3588 lookup table
The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.

This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")

Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.

Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
6891bdf711 configs: rockchip: rock5b-rk3588: add pinctrl to SPL
Add pinctrl driver in SPL. Do not remove pinctrl properties for SPL dtb.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
cec4f82f11 ARM: dts: rk3588-rock-5b-u-boot: add bootph-all to pinctrl for sdmmc
To be able to initialize the pinctrl correctly at SPL level and read
u-boot proper from SD-Card, the pinctrl must be initialized.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-17 17:36:18 +08:00
Jonas Karlman
e74ac44f79 phy: Keep balance of counts when ops is missing
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fixes: 226fce6108 ("phy: Track power-on and init counts in uclass")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-05-17 17:36:18 +08:00
Eugen Hristev
cdf9010f6e phy: rockchip-inno-usb2: add initial support for rk3588 PHY
Add initial support for the rk3588 PHY variant.
The lookup for the host-port reg inside the struct now does a do {} while()
instead of a while() {} in order to allow a first check for reg == 0.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Co-developed-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
b59e031a7d phy: remove phy-supply related code
phy-supply is now handled at uclass level. Remove it from the drivers that
implement it at the driver level.

Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
c57e0dcd93 phy: add support for phy-supply
Some phys require a phy-supply property that is a phandle to a regulator
that needs to be enabled for phy operations.
Implement basic supply lookup, enable and disabling, if DM_REGULATOR is
available.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[jonas@kwiboo.se:
use regulator_set_enable_if_allowed and disable if power_on ops fails]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 17:36:18 +08:00
Eugen Hristev
adef6ebc06 configs: rockchip: rock5b-rk3588: enable USB and regulators
Enable USB command, USB drivers, PHY and regulators, for USB host
operations.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 17:36:14 +08:00
Eugen Hristev
9ceef3d9a7 ARM: dts: rockchip: rk3588-rock-5b-u-boot: add USB 2.0 host
Add USB 2.0 host nodes and PHYs.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Co-developed-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 09:53:32 +08:00
Tom Rini
f0e201433a Merge branch 'next_gpio' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
- gpio: renesas: Simplify .request/.rfree callbacks
2023-05-16 20:24:44 -04:00
Tom Rini
f9c58e0f1a Merge branch '2023-05-16-remove-misuse-of-env-is-nowhere' into next
To quote the author:

When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.
2023-05-16 20:24:21 -04:00
Marek Vasut
da83ada02a usb: gadget: Add and use matching SPL USB ethernet gadget Kconfig symbols
Define SPL_USB_ETH_RNDIS symbol to make it possible to select USB
gadget ethernet support in SPL and U-Boot separately in Kconfig .
Make use of the new symbols in gadget Makefile and move the rndis.o
just below the now merged USB_ETHER symbol in Makefile.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-17 01:51:39 +02:00
Marek Vasut
0007fb2ff7 usb: Move SPL_USB_GADGET and related Kconfig symbols to drivers/usb/
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_GADGET and related symbols. Fix typo and
rename SPL_USB_GADGET to "USB Gadget Support in SPL" .

Update the gadget Makefile to match the symbol changes.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-17 01:51:39 +02:00
Marek Vasut
6308731648 usb: Move SPL_USB_STORAGE Kconfig symbol to drivers/usb/
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_STORAGE and matching SYS_USB_FAT_BOOT_PARTITION .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-17 01:51:39 +02:00
Marek Vasut
df104411d1 usb: Move SPL_USB_HOST Kconfig symbol to drivers/usb/
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_HOST and updates help text of both USB_HOST
and SPL_USB_HOST .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-17 01:51:39 +02:00
Pali Rohár
a74931a945 gpio: renesas: Simplify .request/.rfree callbacks
Remove identify wrapper functions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-05-16 22:24:24 +02:00
Stefan Herbrechtsmeier
8344162ea8 env: Remove misuse of env is nowhere leftover
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove leftover of
misuse of the env is nowhere driver as default environment.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2023-05-16 16:12:21 -04:00
Stefan Herbrechtsmeier
35a6fdc58d powerpc/mpc85xx: socrates: Remove misuse of env is nowhere driver
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2023-05-16 16:12:21 -04:00
Stefan Herbrechtsmeier
b16fd7f75f imx6q: acc: Remove misuse of env is nowhere driver
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2023-05-16 16:12:21 -04:00
Stefan Herbrechtsmeier
78b54e323f imx6: aristainetos: Remove misuse of env is nowhere driver
When using a list of writeable variables, the initial values come from
the built-in default environment since commit 5ab8105836
("env: Complete generic support for writable list"). Remove unnecessary
misuse of the env is nowhere driver as default environment.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2023-05-16 16:12:21 -04:00
Tom Rini
6e1852ca2c Pull request efi-2023-07-rc3
Documentation:
 
 * update the description of signature algorithms
 
 UEFI:
 
 * fix unaligned access to GUID in HII database protocol
 * fix launching EFI binaries loaded via semihosting
 * fix filling of file path in loaded image protocol for non-block devices
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Merge tag 'efi-2023-07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2023-07-rc3

Documentation:

* update the description of signature algorithms

UEFI:

* fix unaligned access to GUID in HII database protocol
* fix launching EFI binaries loaded via semihosting
* fix filling of file path in loaded image protocol for non-block devices
2023-05-16 11:23:30 -04:00
Tom Rini
5645a50a86 Merge branch '2023-05-15-assorted-bugfixes'
- Merge in a long-standing fix for some exynos platforms, correct a
  Kconfig description, fix some env issues, fix an issue in
  devfdt_get_addr_size_index_ptr and look for "panel-timings" not
  "panel-timing" per upstream binding.
2023-05-16 11:16:42 -04:00