Commit graph

59907 commits

Author SHA1 Message Date
Manivannan Sadhasivam
122537e1f3 mmc: Add support for HI3660 SoC reusing hi6220_dw_mmc driver
This commit adds MMC driver support for HI3660 SoC reusing hi6220_dw_mmc
driver. Since HI3660 operates at different clock rate and uses fifo
mode now, let's introduce the platform data and utilize it for different
SoCs supported by this driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-08-11 16:43:41 -04:00
Manivannan Sadhasivam
c62c7ef779 board: hisilicon: Add support for Hikey960 board
This commit adds board support for Hikey960 board from Hisilicon. This
board is one of the Consumer Edition boards of the 96Boards family
powered by Kirin960 SoC.

More information about this board can be found in 96Boards website:
https://www.96boards.org/product/hikey960/

The initial supported/tested devices include:
 - Debug serial
 - SD

With these support, it's good enough for loading Linux Kernel from SD.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-08-11 16:43:41 -04:00
Manivannan Sadhasivam
881b6324f0 arm: dts: Add devicetree for Hikey960 board
This commit adds devicetree for Hikey960 board. Most of the contents are
copied from Linux kernel with some modifications for u-boot. To be
more precise, SD card's speed related properties are removed due to a
bug in u-boot clock implementation. Hence forcing the SD controller to
work in standard speed.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-08-11 16:43:41 -04:00
Manivannan Sadhasivam
af8a735ed0 arm: dts: Import HI3660 devicetree from Linux
This commit imports HI3660 SoC devicetree from Linux

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-08-11 16:43:41 -04:00
Simon Goldschmidt
d8c0332031 spl: implement stack usage check
This implements a stack usage check in SPL.

Many boards start up SPL to run code + data from one common, rather small
SRAM. To implement a sophisticated SPL binary size limit on such boards,
the stack size (as well as malloc size and global data size) must be
subtracted from this SRAM size.

However, to do that properly, the stack size first needs to be known.

This patch adds a new Kconfig option:
- SPL_SYS_REPORT_STACK_F_USAGE: memset(0xaa) the whole area of the stack
  very early and check stack usage based on this constant later before the
  stack is switched to DRAM

Initializing the stack and checking it is implemented in weak functions,
in case a board does not use the stack as saved in gd->start_addr_sp.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-08-11 16:43:41 -04:00
Ye Li
af325e9597 serial_lpuart: Fix config check issue when using clk driver in SPL
Should use CONFIG_IS_ENABLED not IS_ENABLED for CLK driver, so it will
check the CONFIG_SPL_CLK when building SPL

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-11 16:43:41 -04:00
Ley Foon Tan
d44f793207 pci: intel: Fix configuration type based on secondary number
This fix issue when access config from PCIe switch.

The PCIe controller need to send Type 0 config TLP if the targeting bus
matches with the secondary bus number, which is when the TLP is targeting
the immediate device on the link.

The PCIe controller send Type 1 config TLP if the targeting bus is
larger than the secondary bus, which is when the TLP is targeting the
device not immediate on the link.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-08-11 16:43:41 -04:00
Ley Foon Tan
bf9b9813ad pci: intel: Fix error when enumerating multi-function PCIe device
Hardware return completion status non-zero when read from non exist
function in multi-function PCIe device. Return error will cause PCIe
enumeration fail.

Change it to return 0 and return value 0xffffffff when error.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-08-11 16:43:41 -04:00
Ley Foon Tan
d0e52c6f29 pci: intel: Increase TLP polling counter
Some PCIe devices require longer time to response.
Increase polling counter to 20000 (~100ms).

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-08-11 16:43:41 -04:00
Anatolij Gustschin
490e6d6859 board: siemens: extend factoryset reading for giedi and deneb boards
giedi and deneb are i.MX8X based and have additional data with
WLAN MAC in factoryset container. Enable building for these
boards and adapt factoryset functions to set WLAN MAC and dtb
name in environment.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2019-08-11 16:42:03 -04:00
Anatolij Gustschin
4987bc2a1a board: siemens: adapt factoryset reading for DM_I2C enabled boards
For new boards we always enable DM_I2C. Extend factoryset functions
to support EEPROM reading on these boards.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2019-08-11 16:42:03 -04:00
Tom Rini
feb5a02f86 Merge branch 'master' of git://git.denx.de/u-boot-sh
- R8A77980 V3H support
2019-08-10 17:57:58 -04:00
Tom Rini
31d136926b Merge branch 'master' of git://git.denx.de/u-boot-usb
- DaVinci USB updates
- Various OHCI fixes
- Gadget fixes
2019-08-10 12:21:27 -04:00
Tom Rini
9fd8b2c8c7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Enable SD slot on Intel Edison
- Populate CSRT ACPI table for shared DMA controller on Intel Tangier
- Convert Intel ICH-SPI driver to use new spi-mem ops
- Enable config_distro_bootcmd for QEMU x86
- Support U-Boot as a payload for Intel Slim Bootloader
- Avoid writing temporary asl files into the source tree which fixes the
  parallel build issue occasionally seen
2019-08-09 23:27:15 -04:00
Marek Vasut
3ebb91914f ARM: renesas: Add R8A77980 V3H Condor board code
Add board code for the R8A77980 V3H Condor board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
57ede1a3d4 ARM: renesas: Add R8A77980 V3H platform code
Add a few bits of platform code to support R8A77980 V3H SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
a811e19b91 ARM: dts: renesas: Add R8A77980 V3H DTs and headers
Import R8A77980 V3H DTs and headers from Linux 5.2.7 , commit 5697a9d3d55f.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
ca6da6dd93 clk: renesas: Add R8A77980 V3H clock tables
Import R8A77980 V3H clock tables from Linux 5.2.7 , commit 5697a9d3d55f.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
f497ec368e pinctrl: renesas: Add R8A77980 V3H PFC tables
Import R8A77980 V3H PFC tables from Linux 5.2.7 , commit 5697a9d3d55f.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
7234a28664 net: sh_eth: Fix 64bit build warnings
Fix various type warnings when building this driver for 64bit machine.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
46c33166d1 net: sh_eth: Add R8A77980 V3H gether support
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth
driver, add them to support ethernet on R8A77980.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Tom Rini
188f010905 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2019-08-09 13:21:53 -04:00
Igor Opaniuk
bd20266d19 apalis-tk1: configs: remove legacy usbboot command
Remove obsolete legacy usbboot wrapper, as distroboot can handle
booting from USB drivers.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:35 -07:00
Marcel Ziswiler
4c63a601b9 apalis-tk1: support v1.2 hardware revision
Support the V1.2 hardware revision with the following pin muxing
changes:

Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4
are now used as DDC pins.

Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are
now used as USB power enable signals.

Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power
enable signals are now used as GPIO3 and GPIO4.

Additionally a new device tree file tegra124-apalis-v1.2-eval.dtb is
loaded on V1.2 and later modules and resp. USB power enable signals
activated.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:35 -07:00
Dominik Sliwa
5a20adf446 apalis-tk1: remove non-essential power rails on boot
When mainline kernels reboot TK1 they use SW_RESET,
that reset mode does not reset PMIC. Some rails
need to be off for RAM Re-repair to work correctly.

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:35 -07:00
Marcel Ziswiler
d415eab4f0 apalis-tk1: remove default vesa vga mode from vidargs
Remove video=tegrafb0:640x480-16@60 aka VESA VGA mode from vidargs in
order for the panel specification in the device tree to be used. This
causes the default to be the 10.1" LVDS display which will be available
in the Toradex webshop shortly.

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:35 -07:00
Dominik Sliwa
fbcb925654 apalis-tk1/t30: colibri_t30: display reset reason
Display proper reset reason after the SoC info.

Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:35 -07:00
Igor Opaniuk
8c57395d49 apalis-tk1: switch to zImage
Switch to the generic compressed Kernel image type (zImage) instead of
the U-Boot specific uImage format.

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:35 -07:00
Igor Opaniuk
f7c668a4e8 apalis-tk1: add pcie_aspm=off to defargs
Disabling ASPM fixes incompatibilities with some PCIe cards

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Igor Opaniuk
11d96e122a apalis-tk1: enable user debug by default
Let the kernel print some debug messages when a user program
crashes due to an exception.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Igor Opaniuk
8fd734c49c apalis-tk1: provide proper USB vendor id
Use unified values for USB Product/Vendor numbers
when the config block is missing

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Igor Opaniuk
538ab6c0a1 apalis-tk1: set apalis gpio 8 aka fan_en
Make sure the Apalis GPIO 8 aka FAN_EN is on when using Apalis TK1
modules.

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Marcel Ziswiler
5b5de78b4a apalis-tk1: do not explicitly release reset_moci#
By keeping RESET_MOCI_CTRL low we avoid explicitly releasing
RESET_MOCI#.

Please note that module hardware versions up to V1.1A will already
release RESET_MOCI# in hardware coming out of reset.

Please further note that with this change the USB hub on the Apalis
Evaluation board is kept in reset in U-Boot and therefore none of its
ports are operational in U-Boot.

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Igor Opaniuk
f028c9f437 colibri/apalis tegra: drop DFU support
We never really added a sensible DFU configuration for platforms
based on eMMC. Most of the things one might want to do can also be done
with UMS or fastboot, so drop the DFU configuration.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Trent Piepho
b78d97ea49 mmc: Move tegra loopback disable option to be under tegra
This is a configuration option specific to the tegra controller.

Doing it this way makes it show up directly under the tegra controller
option, indented one level, as "Disable external clock loopback".

The way it is now, it shows up at the end of the controller list, not
indented, as if it's some kind of generic MMC configuration option.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Simon Glass
b4bf71456d sound: Add codec enable to the sound bindings
For U-Boot we allow a GPIO to be specified to enable the codec. Add this
to the relevant binding files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Simon Glass
9944d753cb sound: tegra: Add the binding file for tegra-audio
This file was missed when adding the sound driver to U-Boot. Bring it in
from Linux 5.0.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Simon Glass
e070311ce8 sound: snow: Add the binding file for snow
This file was missed when adding the sound driver to U-Boot. Bring it in
from Linux 5.0.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:33 -07:00
Park, Aiden
dbaec46767 x86: Skip setting up MTRRs in slimbootloader
The setting up MTRRs have already been done in previous
Slim Bootloader stages.

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
d8f6db4768 board: intel: Add new slimbootloader board
Add slimbootloader board to run U-boot as a Slim Bootloader payload
- Add new board/intel/slimbootloader directory with minimum codes
- Add slimbootloader configuration files
- Add doc/board/intel/slimbootloader.rst

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add slimbootloader board MAINTAINERS file]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
19cad267d9 x86: slimbootloader: Add a slimbootloader device tree
Add a new device tree which has very minimum nodes
- x86 reset
- x86 tsc_timer
- x86 pci
- Slim Bootloader serial

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
14360bf059 x86: slimbootloader: Set TSC information for tsc_timer
Slim Bootloader already calibrated TSC and provides it to U-Boot.
Therefore, U-Boot does not have to re-calibrate TSC.
Configuring tsc_base and clock_rate makes x86 tsc_timer driver bypass
TSC calibration and use the provided TSC frequency.
- Get TSC frequency from performance info hob
- Set tsc_base and clock_rate for tsc_timer driver

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
2869c3b3de x86: slimbootloader: Add serial driver
Slim Bootloader provides serial port info thru its HOB list pointer.
All these HOBs are eligible for Slim Bootloader based board only.
- Get serial port information from the serial port info HOB
- Leverage ns16550 driver with slimbootloader specific platform data

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
1fb17ea548 x86: slimbootloader: Add memory configuration
Slim Bootloader provides memory map info thru its HOB list pointer.
Configure memory size and relocation memory from the HOB data, and
provide e820 entries as well.
- Get memory size from the memory map info HOB
- Set available top memory lower than 4GB for U-Boot relocation
- Provide e820 entries from the memory map info HOB

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
7165fd584f x86: Add a common HOB library
FSP (CONFIG_HAVE_FSP) and Slim Bootloader (CONFIG_SYS_SLIMBOOTLOADER)
consume HOB (CONFIG_USE_HOB) data from the each HOB list pointer.
Add a common HOB library in lib/hob.c and include/asm/hob.h.

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
5b931a5080 x86: lib: fsp: Use EFI_GUID and efi_guid_t
Use existing EFI_GUID and efi_guid_t instead of struct efi_guid.
This is pre-work before making a common HOB library.
- Change 'struct efi_guid' to efi_guit_t
- Remove 'struct efi_guid'
- Define GUIDs with EFI_GUID() macro
- Use guidcmp() instead of compare_guid()
- Remove compare_guid()

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Tested on MinnowMax
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Park, Aiden
544293f878 x86: Add new slimbootloader CPU type
This slimbootloader CPU type is to enable U-Boot as a payload which
runs on top of Slim Bootloader (https://github.com/slimbootloader).
The Slim Bootloader is designed with multi-stage architecture for
the execution from reset vector to OS booting, and supports QEMU,
Apollolake, Whiskeylake and Coffeelake platforms consuming Intel
FSP (https://github.com/IntelFsp) for silicon initialization
including CAR and memory initialization.
The Slim Bootloader generates new HOB (Hand Off Block) which are
serial port info, memory map info, performance data info and so on,
and passes it to a Payload. U-Boot as a payload will use these HOB
information for basic initialization such as serial console.

As an initial commit,
- Add CONFIG_SYS_SLIMBOOTLOADER to enable slimbootloader CPU type
- Add new arch/x86/cpu/slimbootloader directory with minimum codes
- Get hob_list pointer from Slim Bootloader

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Bernhard Messerklinger
0709ddb68f x86: ich-spi: Convert driver to spi-mem ops
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Tested on Intel CrownBay and MinnowMax
Tested-by: Bin Meng <bmeng.cn@gmail.com>

[bmeng: fix compiler warnings when building the driver for 64-bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Heinrich Schuchardt
fd95e10178 bios_emulator: remove stray break
Remove a stray break which suppresses some debug messages.

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Simon Glass
c1865bbd16 x86: Avoid writing temporary asl files into the source tree
At present the iasl tool (Intel ACPI (Advanced Configuration and Power
Interface) Source Language Compiler) is called in such a way that it uses
the source directory for its temporary files.

This means we end up with these files when building x86 boards:

   board/dfi/dfi-bt700/dsdt.aml
   board/dfi/dfi-bt700/dsdt.asl.tmp

Update the code to put temporary files in the target directory instead.

The iasl tool is quite confusing since it generates files with different
extensions and does not allow these to be individually specified. Add some
documentation to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove dsdt.hex from 'make clean' rules and correct U-Boot spelling]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00