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9 commits

Author SHA1 Message Date
Da Xue
8c6d8c3219 configs: libretech: set SPI mode to 0 
Kconfig defaults to mode 3 if CONFIG_SF_DEFAULT_MODE is not set.
It becomes an issue since meson_spifc does not support SPI_CPHA.
Needed after commit e2e95e5e25 ("spi: Update speed/mode on change").

Fixes: e2e95e5e25 ("spi: Update speed/mode on change")
Signed-off-by:Da Xue <da@libre.computer>
[narmstrong: reformated commit reference & added Fixes tag]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
 2021-07-02 23:59:27 +02:00
Tom Rini
2bba78076b configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2021-06-28 10:17:29 -04:00
Tom Rini
838157d02e configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2021-05-11 12:19:09 -04:00
Tom Rini
79b0f08d6a configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2021-04-27 08:28:38 -04:00
Neil Armstrong
888422ea17 configs: meson: use Designware glue driver for Amlogic Meson8b & later SoCs 
Use the proper Synopsys DWMAC Meson8b glue to handle the ethernet link type.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
 2021-04-06 11:10:29 +02:00
Neil Armstrong
6950ba4680 configs: update Amlogic Meson GXL & GXM config for MDIO MUX 
Use DM_MDIO and the new MMIOREG MDIO MUX driver for GXL & GXM board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
 2021-04-06 11:10:29 +02:00
Tom Rini
6ad0769c8e configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2021-03-15 10:50:47 -04:00
Tom Rini
472a716b8f configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2021-01-29 13:56:04 -05:00
Jerome Brunet
ade0100a91 arm64: meson: add support for libretech-cc v2 
Add support for the Amlogic based libretech cc version 2.
As version 1, it is based on the s905x SoC.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: Fixed libretech-cc.rst bullet points]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
 2021-01-11 14:59:54 +01:00