Commit graph

64067 commits

Author SHA1 Message Date
Tom Rini
74bf17db39 Merge branch 'master' of git://git.denx.de/u-boot-sh
- net: sh_eth: Init the hardware before PHY access
2020-04-04 19:20:45 -04:00
Tom Rini
a7b86eb524 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- verdin-imx8mm board reST documentation update
- Intel Edison board ACPI table I2C/USB minor updates
- Fix a regression of ns16550 serial driver that breaks Intel Edison
2020-04-04 19:20:26 -04:00
Bin Meng
9e6ce62190 serial: ns16550: Fix ordering of getting base address
Currently the driver gets ns16550 base address in the driver
probe() routine, which may potentially break any ns16550 wrapper
driver that does additional initialization before calling
ns16550_serial_probe().

Things are complicated that we need consider ns16550 devices on
both simple-bus and PCI bus. To fix the issue we move the base
address assignment for simple-bus ns16550 device back to the
ofdata_to_platdata(), and assign base address for PCI ns16550
device in ns16550_serial_probe().

This is still not perfect. If any PCI bus based ns16550 wrapper
driver tries to access plat->base before calling probe(), it is
still subject to break.

Fixes: 720f9e1fdb ("serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()")
Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-04 22:08:44 +08:00
Andy Shevchenko
4d073fa83b x86: acpi: Describe USB 3 host controller found on Intel Tangier
USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-04 22:08:44 +08:00
Andy Shevchenko
d0f7ab5310 x86: acpi: Add I²C timings to Intel Merrifield platform
There is established way to provide I²C timings, or actually counters,
to the OS via ACPI. Fill them for Intel Merrifield platform.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-04 22:08:44 +08:00
Igor Opaniuk
63a6098961 doc: board: verdin-imx8mm: use mainline TF-A
1. Update build steps where mainline Trusted Firmware A is used.
2. Fix BL31_BASE to the proper one according to the SoC reference
manual.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-04 22:08:44 +08:00
Andy Shevchenko
ddcccb2b2c x86: acpi: Refactor XSDT handling in acpi_add_table()
There is no need to have an assignment to NULL for XSDT pointer.
Therefore, no need to assign it when rsdt_address is not set.
Because of above changes we may decrease indentation level as well.

While here, drop unnecessary parentheses.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-04 22:08:44 +08:00
Marek Vasut
b13da11255 net: sh_eth: Init the hardware before PHY access
To access the PHY, the MAC registers must be initialized. Call the init
function in probe() to make it so, otherwise the PHY ID readout returns
all zeroes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-04 15:06:37 +02:00
Tom Rini
60f1cc529c Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
- Add support for Jetson Nano, plus miscellaneous other fixes found
  during Nano bringup.
- Add Igor's update_uboot wrapper patches.
2020-04-03 16:05:46 -04:00
Michal Simek
e14ba8a577 arch: Add explicit linker script for u-boot-elf
Commit f4dc714aaa ("arm64: Turn u-boot.bin back into an ELF file after
relocate-rela")
introduce REMAKE_ELF option to recreate u-boot.elf from u-boot ->
u-boot.bin + DT -> u-boot.elf.

The best is to ilustrate it from make V=1 output
  cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
  cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64  u-boot.bin u-boot-elf.o
  aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf --defsym="_start"=0x8000000 -Ttext=0x8000000

Last command has no explicit linker script passed that's why toolchain
internal linker script is used.
In Binutils 2.32 case it contains SIZEOF_HEADERS symbol which has changed
behavior by commit
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=64029e93683a266c38d19789e780f3748bd6a188
which result in situation that program headers has changed from
(xilinx_zynqmp_mini_defconfig)

Program Headers:
  Type           Offset             VirtAddr           PhysAddr
                 FileSiz            MemSiz              Flags  Align
  LOAD           0x0000000000010000 0x00000000fffc0000 0x00000000fffc0000
                 0x0000000000018918 0x0000000000018918  RW     0x10000

to

Program Headers:
  Type           Offset             VirtAddr           PhysAddr
                 FileSiz            MemSiz              Flags  Align
  LOAD           0x0000000000000000 0x00000000fffb0000 0x00000000fffb0000
                 0x0000000000028918 0x0000000000028918  RW     0x10000

Xilinx tools like XSDB or Bootgen are using program headers for loading ELF
to the right location and by above binutils change ELF is loaded to
incorrect location.

The patch is explicitly use u-boot-elf.lds (just cat now) for u-boot.elf
recreation which is called when REMAKE_ELF is setup.
By purpose u-boot-elf.lds doesn't contain OUTPUT_FORMAT/OUTPUT_ARCH to be
able to use by all archs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-By: Álvaro Fernández Rojas <noltari@gmail.com>
2020-04-03 11:52:55 -04:00
Jan-Christoph Tebbe
740370282e mach-snapdragon: Fix overwriting last digit of serial number
When generating the MAC address based on the boards serial number
the last digit was overwritten with the null termination. That way
boards with serial numbers close to each other would use the same
MAC address.

Signed-off-by: Jan-Christoph Tebbe <Jan-Christoph.Tebbe@ithinx.io>
2020-04-03 11:47:47 -04:00
Ye Li
9d15d1d1c2 Revert "common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled"
Commit cf8dcc5d02 ("common: spl_fit: Default to IH_OS_U_BOOT if
FIT_IMAGE_TINY enabled") is not correct, it will append fdt to each loadable
image. Actually when using TINY FIT, the first loadable image is thought as
u-boot and already have fdt appended.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2020-04-03 11:29:23 -04:00
Tom Rini
6aff13a358 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- fix for MMIO window size (Tudor Ambarus)
2020-04-03 11:26:13 -04:00
Tom Warren
7c02bc9649 ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
The Jetson Nano Developer Kit is a Tegra X1-based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4GB
of LPDDR4, a SPI NOR flash for early boot firmware and an SD card slot
used for storage.

HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity. NVMe support
has also been added. Env save is at the end of QSPI (4MB-8K).

A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 14:30:02 -07:00
Tom Warren
808e19362f mtd: spi: Add Macronix MX25U3235F device
Add Macronix MX25U3235F flash device description.
This is a 4MiB part.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:02 -07:00
Tom Warren
5dc1dc804d t210: Adjust ramdisk_addr_r/fdt_addr_r to allow for large kernels
The L4T kernel is 32MB+, and can overwrite the ramdisk/fdt loaded
from extlinux.conf. Adjust the load addresses to fix this for now.
Using the calculated_env addresses table from T186 U-Boot is a
better fix, but it isn't working correctly on T210 U-Boot right now,
so this will do until I can fix it.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:02 -07:00
Tom Warren
b1747fdb82 qspi: t210: Use dev_read calls to get FDT data like base, freq
This Tegra QSPI driver hadn't been brought up to date with how
DM drivers are fetching data from the FDT now, and was pulling
in bogus data for base, max freq, etc. Fixed ofdata_to_platdata
to work the same way it does in the tegra114 SPI driver, using
dev_read_ functions.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:02 -07:00
Tom Warren
2fcc3ba1b7 qspi: t210: Fix QSPI clock and tap delays
When claim_bus was setting the clock, it reset the QSPI controller,
which wipes out any tap delays set by previous bootloaders (nvtboot,
CBoot for example on Nano). Instead of doing that in claim_bus, which
gets called a lot, moved clock setting to probe(), and set tap delays
there, too. Also updated clock to 80MHz to match CBoot. Now QSPI env
save works reliably again.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:02 -07:00
Tom Warren
3c8cf24032 qspi: t210: Fix claim_bus's use of the wrong bus/device
claim_bus() is passed a udevice *dev, which is the bus device's parent.
In this driver, claim_bus assumed it was the bus, which caused the
'priv' info pointer to be wrong, and periph_id was incorrect. This in
turn caused the periph clock call to assign the wrong clock (PLLM
instead of PLLP0), which caused a kernel warning. I only saw the 'bad'
periph_id when enabling DEBUG due to an assert. Not sure how QSPI was
working w/this errant clock, but it was moot as QSPI wasn't active
unless you probed it, and that wasn't happening until I posted a patch
to enable env save to QSPI for Nano (coming soon).

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:02 -07:00
Tom Warren
a482f32992 mmc: t210: Fix 'bad' SD-card clock when doing 400KHz card detect
According to the HW team, for some reason the normal clock select code
picks what appears to be a perfectly valid 375KHz SD card clock, based
on the CAR clock source and SDMMC1 controller register settings (CAR =
408MHz PLLP0 divided by 68 for 6MHz, then a SD Clock Control register
divisor of 16 = 375KHz). But the resulting SD card clock, as measured by
the HW team, is 700KHz, which is out-of-spec. So the WAR is to use the
values given in the TRM PLLP table to generate a 400KHz SD-clock (CAR
clock of 24.7MHz, SD Clock Control divisor of 62) only for SDMMC1 on
T210 when the requested clock is <= 400KHz. Note that as far as I can
tell, the other requests for clocks in the Tegra MMC driver result in
valid SD clocks.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-04-02 14:30:01 -07:00
Tom Warren
5e965e8140 mmc: t210: Add autocal and tap/trim updates for SDMMC1/3
As per the T210 TRM, when running at 3.3v, the SDMMC1 tap/trim and
autocal values need to be set to condition the signals correctly before
talking to the SD-card. This is the same as what's being done in CBoot,
but it gets reset when the SDMMC1 HW is soft-reset during SD driver
init, so needs to be repeated here. Also set autocal and tap/trim for
SDMMC3, although no T210 boards use it for SD-card at this time.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-04-02 14:30:01 -07:00
Tom Warren
224595abaa tegra: Enable CONFIG_BOOTP_PREFER_SERVERIP for all Jetson boards
This allows the user to set $serverip in the environment before
executing a DHCP request. If they do, U-Boot will use that IP rather
than using the IP in the DHCP response.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02 14:30:01 -07:00
Vishruth
c0d436fe89 ARM: tegra: p2771-0000: enable PIE relocation
U-Boot is configured to build as position independent executable. Enable
relocation of RELA section required to work with different load
addresses.

Signed-off-by: Vishruth <vishruthj@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Peter Robinson <probinson@gmail.com>
2020-04-02 14:30:01 -07:00
Tom Warren
d43c1dc2e8 i2c: t210: Add VI_I2C clock source support
Fix VI_I2C clock source type. Will be needed by VI_I2C driver.
Also added use of INTERNAL_ID macro in two places, needed to keep
the id returned to 8 bits.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:01 -07:00
Tom Warren
48ba1969c1 t210: pinmux: Remove pinmux/GPIO init from T210 boards
T210 CBoot is now doing the full pinmux and GPIO init, based on the DTB
tables. Remove pinmux/GPIO init tables & code from all T210-based builds
below:

p2371-2180 aka TX1
p2371-0000
e2220-1170
p2571

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02 14:30:01 -07:00
JC Kuo
d491dc09e4 t210: do not enable PLLE and UPHY PLL HW PWRSEQ
This commit removes the programming sequence that enables PLLE and UPHY
PLL hardware power sequencers. Per TRM, boot software should enable PLLE
and UPHY PLLs in software controlled power-on state and should power
down PLL before jumping into kernel or the next stage boot software.

Adds call to board_cleanup_before_linux to facilitate this.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02 14:30:01 -07:00
Stephen Warren
9eb15cbe5c ARM: tegra: p2371-2180: add I2C nodes to DT
This adds to the DT the I2C controllers that connect to the board ID EEPROM,
etc. With this change, you can now probe all I2C devices on a TX1 board.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-02 14:30:01 -07:00
Igor Opaniuk
b308ffb0bf colibri_t30: add update_uboot wrapper
Add universal update_uboot wrapper that helps to update
U-Boot image on internal storage.

Create an proper tegra image:
$ cbootimage -s tegra30 colibri_t30.img.cfg colibri_t30.img

Flash in U-boot shell:
> tftpboot ${loadaddr} ${board_name}/${board_name}.img
> run update_uboot

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-02 14:30:00 -07:00
Igor Opaniuk
a63dd98400 colibri_t20: add update_uboot wrapper
Add universal update_uboot wrapper that helps to update
U-Boot image on internal storage(NAND).

Create an proper tegra image:
$ cbootimage -s tegra20 colibri_t20-512-v12-nand.img.cfg colibri_t20.img

Flash in U-boot shell:
> tftpboot ${loadaddr} ${board_name}/${board_name}.img
> run update_uboot

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-02 14:30:00 -07:00
Igor Opaniuk
195b48367f apalis_t30: add update_uboot wrapper
Add universal update_uboot wrapper that helps to update
U-Boot image on internal storage.

Create an proper tegra image:
$ cbootimage -s tegra30 apalis_t30.img.cfg apalis_t30.img

Flash in U-boot shell:
> tftpboot ${loadaddr} ${board_name}/${board_name}.img
> run update_uboot

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-02 14:30:00 -07:00
Igor Opaniuk
c9d1ff70e2 apalis-tk1: add update_uboot wrapper
Add universal update_uboot wrapper that helps to update
U-Boot image on internal storage.

Create an proper tegra image:
$ cbootimage -s tegra124 apalis-tk1.img.cfg apalis-tk1.img

Flash in U-boot shell:
> tftpboot ${loadaddr} ${board_name}/${board_name}.img
> run update_uboot

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-02 14:30:00 -07:00
Tom Rini
a71e47ad31 - rockchip RK3399 HDMI output fix
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Merge tag 'video-fixes-2apr20' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- rockchip RK3399 HDMI output fix
2020-04-02 12:15:17 -04:00
Jagan Teki
05c65a82c3 video: rockchip: Support 4K resolution for rk3399, HDMI
The default resolution for rockchip display is 1920x1080
which failed to work on 4K HDMI out displays on rk3399.

So, mark the default resolution as 3480x2160 for rk3399
HDMI out.

This would work all the hdmi display resolutions till
4K.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 15:52:01 +02:00
Jagan Teki
9778edae55 rockchip: Enable HDMI output on rk3399 board w/ HDMI
Enable config options and console setting to respective
rk3399 board for HDMI output.

Boards supported and tested on this patch are:
- NanoPc T4
- NanoPi M4
- NanoPi Neo4
- ROC-RK3399-PC
- Rock960

Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-02 15:50:25 +02:00
Jagan Teki
61853a7ac7 rockchip: Enable pre console for rk3399
Enable pre console buffer for rk3399 platform.

This would help to capture the console messages prior to
the console being initialised. Enabling this would help
to capture all the console messages on video output source
like HDMI. So we can find the full console messages of
U-Boot proper on HDMI display when enabled it for RK3399
platform boards.

Buffer address used for pre console is 0x0f200000 which is
ram base plus 240MiB. right now the Allwinner SoC is using
similar computation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 15:49:16 +02:00
Jagan Teki
e67243f1a3 video: rockchip: Fix vop modes for rk3399
VOP display endpoint pipeline configuration differs
between rk3288 vs rk3399.

These VOP pipeline configuration depends on how the
different display interfaces connected in sequence to
IN and OUT ports like for,

RK3288:

vopb_out: port {
	#address-cells = <1>;
	#size-cells = <0>;
	vopb_out_edp: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&edp_in_vopb>;
	};
	vopb_out_hdmi: endpoint@1 {
		reg = <1>;
                remote-endpoint = <&hdmi_in_vopb>;
        };
        vopb_out_lvds: endpoint@2 {
                reg = <2>;
                remote-endpoint = <&lvds_in_vopb>;
        };
        vopb_out_mipi: endpoint@3 {
                reg = <3>;
                remote-endpoint = <&mipi_in_vopb>;
        };
};

RK3399:

vopb_out: port {
         #address-cells = <1>;
         #size-cells = <0>;
         vopb_out_edp: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&edp_in_vopb>;
         };
         vopb_out_mipi: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&mipi_in_vopb>;
         };
         vopb_out_hdmi: endpoint@2 {
                reg = <2>;
                remote-endpoint = <&hdmi_in_vopb>;
         };
         vopb_out_mipi1: endpoint@3 {
                reg = <3>;
                remote-endpoint = <&mipi1_in_vopb>;
         };
         vopb_out_dp: endpoint@4 {
                reg = <4>;
                remote-endpoint = <&dp_in_vopb>;
         };
};

here, HDMI interface has endpoint 1 in rk3288 and 2 in rk3399.

The rockchip vop driver often depends on this determined endpoint
number and stored in vop_mode. So based on this vop_mode the bpp
and pin polarity would configure on detected display interface.

Since, the existing driver using rk3288 vop mode settings enabling
the same will result wrong display interface configuration for rk3399.

Add the patch for fixing these vop modes for rk3399.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 15:47:35 +02:00
Jagan Teki
b1bcd61665 clk: rk3399: Set empty for vopl assigned-clocks
During vidconsole probe, the device probe will try to
check whether the assigned clocks on that video console
node is initialized or not? and return an error if not.

But, unlike Linux U-Boot won't require to handle these
vopl assigned-clocks since core clocks are enough to
handle the video out to process.

So, mark them as empty in set_rate to satisfy clk_set_defaults
so-that probe happened properly.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-02 15:44:56 +02:00
Tudor Ambarus
52e2565bfb spi: atmel-quadspi: Add verbose debug facilities to monitor register accesses
This feature should not be enabled in release but can be useful for
developers who need to monitor register accesses at some specific places.

Helped me identify a bug in u-boot, by comparing the register accesses
from the u-boot driver with the ones from its linux variant.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
[jagan: use 16 bit array with tmp variable]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-02 17:17:09 +05:30
Tudor Ambarus
ba03a6c944 spi: atmel-quadspi: fix possible MMIO window size overrun
The sama5d2 QSPI controller memory space is limited to 128MB:
0x9000_00000-0x9800_00000/0XD000_0000--0XD800_0000.

There are nor flashes that are bigger in size than the memory size
supported by the controller: Micron MT25QL02G (256 MB).

Check if the address exceeds the MMIO window size. An improvement
would be to add support for regular SPI mode and fall back to it
when the flash memories overrun the controller's memory space.

Fixes: 24c8ff4684 ("spi: Add Atmel QuadSPI driver")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-02 17:15:55 +05:30
Tom Rini
e0718b3ab7 Vboot vulnerability fix
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Merge tag 'dm-pull-1apr20' of git://git.denx.de/u-boot-dm

Vboot vulnerability fix
2020-04-01 14:29:21 -04:00
Tom Rini
e88c9e6ff1 - Fix device tree of Avenger96 board from Arrow Electronics and add
compatibility with stm32mp15_dhcom_basic_defconfig
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Merge tag 'u-boot-stm32-20200401' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Fix device tree of Avenger96 board from Arrow Electronics and add
  compatibility with stm32mp15_dhcom_basic_defconfig
2020-04-01 09:47:30 -04:00
Simon Glass
0e29648f8e test: vboot: Reduce fake kernel size to 500 bytes
We don't need 5KB to test things out. A smaller size makes it easier to
look at the FIT with fdtdump.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
da76ed2795 test: vboot: Move key creation into a function
This code is repeated so move it into a function with a parameter.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
72188f5462 image: Use constants for 'required' and 'key-name-hint'
These are used in multiple places so update them to use a shared #define.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-04-01 07:45:09 -06:00
Simon Glass
b008677daf test: vboot: Fix pylint errors
Fix various minor things noticed by pylint.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
3156ee35a3 test: vboot: Tidy up the code a little
Fix some long lines and comments. Use a distinct name for the
'required key' test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
c3aa81e35c fit_check_sign: Allow selecting the configuration to verify
This tool always verifies the default configuration. It is useful to be
able to verify a specific one. Add a command-line flag for this and plumb
the logic through.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
8a9d03732e image: Load the correct configuration in fit_check_sign
At present bootm_host_load_images() is passed the configuration that has
been verified, but ignores it and just uses the default configuration.
This may not be the same.

Update this function to use the selected configuration.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
67acad3db7 image: Check hash-nodes when checking configurations
It is currently possible to use a different configuration's signature and
thus bypass the configuration check. Make sure that the configuration node
that was hashed matches the one being checked, to catch this problem.

Also add a proper function comment to fit_config_check_sig() and make it
static.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00
Simon Glass
1b09003202 test: vboot: Parameterise the test
This test is actually made up of five separate tests. Split them out so
that they appear as separate tests.

Unfortunately this restarts U-Boot multiple times which adds about a
second to the already-long vboot test, about 8 seconds total on my
machine. We could add a special 'teardown' test afterwards but if the
tests are executed out of order that would not work.

Changing test_vboot into a class causes it not to be discovered and makes
it different from all other tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-01 07:45:09 -06:00