Commit graph

87449 commits

Author SHA1 Message Date
Peng Fan
1c3f5df259 imx: imx8ulp: start the ELE RNG at boot
On the imx8ulp A1 SoC, the ELE RNG needs to be manually started.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Ye Li
78b4cf7530 imx: misc: ele_mu: Update ELE MU driver
Extend the RX timeout value to 10s, because when authentication is failed
the ELE needs long time (>2s for 28M image) to return the result. Print
rx wait info per 1s.

Also correct TX and RX status registers in debug.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Ye Li
71a21425d2 imx: misc: ele_mu: Update MU TR registers count
According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All
of them are used for ELE message. So update TR count to 8 and fix a
typo in receive msg

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Clement Faure
859f4e02a8 imx: cmd_dek: add ELE DEK Blob generation support
Add ELE DEK Blob generation for the cmd_dek command.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Ye Li
f0e974e1e4 imx: cmd_dek: Fix Uninitialized pointer read
Fix Coverity (CID 21143558).
When tee_shm_register returns failure, the shm_input pointer is
invalid, should not free it. Same issue also exists on registering
shm_output.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
d0e2a012a3 imx: ele_api: add DEK Blob generation
- Add crc computation.
- Add ele_generate_dek_blob API for encrypted boot support.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
31e5ec2323 imx: ele_api: support program secure fuse and return lifecycle
Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse
Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
ef5bdfc273 imx: ele_ahab: use hextoul
Use hextoul which looks a bit simpler.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
914ede6978 imx: parse-container: fix build warning
Fix build warning:
warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3
has type ‘u64’ {aka ‘long long unsigned int’} [-Wformat=]
         printf("can't find memreg for image %d load address 0x%x, error %d\n",
warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘sc_faddr_t’ {aka ‘long long unsigned int’} [-Wformat=]
          debug("memreg %u 0x%lx -- 0x%lx\n", mr, start, end);

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
d3ee9dbd59 imx: use generic name ele(EdgeLockSecure Enclave)
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
922d4504bc imx: scu_api: update to version 1.16 and add more APIs
Upgrade SCFW API to 1.16
Add more APIs:
 sc_misc_get_button_status
 sc_pm_reboot
 sc_seco_v2x_build_info

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
c186596ac4 imx: congatec/cgtqmx8: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
2023-07-13 11:29:40 +02:00
Peng Fan
227c513e70 imx: advantech: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
2023-07-13 11:29:40 +02:00
Peng Fan
0baac09fc9 imx: siemens/capricorn: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
aa6e698a7a imx: toradex/colibri-imx8x: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
bfb3409d67 imx: toradex/apalis-imx8: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
dd654caac0 imx: mach: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Teresa Remmet
e064fe4f37 configs: phycore-imx8mm_defconfig: Enable LTO
Enable LTO for binary size reduction.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2023-07-13 11:29:40 +02:00
Teresa Remmet
b70a1686c8 configs: phycore-imx8mp_defconfig: Enable LTO
Enable LTO for binary size reduction.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2023-07-13 11:29:40 +02:00
Stefan Eichenberger
44103cf331 colibri_imx6: fix RALAT and WALAT values
Running a memtest in U-Boot and Linux shows that some Colibri iMX6
produce bitflips at temperatures above 60°C. This happens because the
RALAT and WALAT values on the Colibri iMX6 are too low. The problems
were introduced by commit 09dbac8174 ("mx6: ddr: Restore ralat/walat
in write level calibration") before the calibration process overwrote
the values and set them to the maximum value. With this commit, we make
sure that the RALAT and WALAT values are set to the maximum values
again. This has been proven to work for years.

Fixes: 09dbac8174 ("mx6: ddr: Restore ralat/walat in write level calibration")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2023-07-13 11:29:40 +02:00
Yannic Moog
8a81326d79 doc: board: phytec: add phycore_imx8mp
Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Plus.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2023-07-13 11:29:40 +02:00
Yannic Moog
b3fad71647 doc: board: phytec: add phycore_imx8mm
Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Mini.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2023-07-13 11:29:40 +02:00
Camelia Groza
6d249769c5 configs: T1024RDB: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T1024RDB defconfigs.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:55:01 +08:00
Camelia Groza
eab4cf5d64 powerpc: dts: t1024rdb: tag serial nodes with bootph-all
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:59 +08:00
Camelia Groza
51f976d40d powerpc: dts: t1024rdb: add serial nodes
Add the serial node descriptions similar to Linux v6.4 for the
t1024rdb board and its dependencies.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:56 +08:00
Camelia Groza
23b60eb7a2 board: freescale: t102xrdb: implement get_serial_clock
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:54 +08:00
Camelia Groza
f416f33ece board: freescale: t102xrdb: enumerate PCI devices
Call pci_init() to force PCI enumeration at probe time.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:53 +08:00
Camelia Groza
e5dd02cb30 configs: T1042D4RDB: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T1042D4RDB defconfigs.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:50 +08:00
Camelia Groza
8cfb187681 powerpc: dts: t1042d4rdb: tag serial nodes with bootph-all
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:44 +08:00
Camelia Groza
014bad7b60 powerpc: dts: t1042d4rdb: add serial nodes
Add the serial node descriptions similar to Linux v6.4 for the
t1042d4rdb board and its dependencies.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:41 +08:00
Camelia Groza
3a359c5000 board: freescale: t104xrdb: implement get_serial_clock
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:38 +08:00
Camelia Groza
4e69a447fa board: freescale: t104xrdb: enumerate PCI devices
Call pci_init() to force PCI enumeration at probe time.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:37 +08:00
Camelia Groza
8cdf82a3e7 configs: T4240RDB: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T4240RDB defconfig.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:35 +08:00
Camelia Groza
cd94430087 powerpc: dts: t4240rdb: tag serial nodes with bootph-all
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:32 +08:00
Camelia Groza
7da20e7889 powerpc: dts: t4240rdb: add serial nodes
Add the serial node descriptions similar to Linux v6.4 for the t4240rdb
board and its dependencies.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:30 +08:00
Camelia Groza
a325e7e8bd board: freescale: t4240rdb: implement get_serial_clock
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:29 +08:00
Camelia Groza
baa807f815 board: freescale: t4240rdb: enumerate PCI devices
Call pci_init() to force PCI enumeration at probe time.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:25 +08:00
Camelia Groza
2a72af59c0 configs: T2080RDB: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the non-SPL T2080RDB defconfigs.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:22 +08:00
Camelia Groza
9e97755387 powerpc: dts: t2080rdb: tag serial nodes with bootph-all
Make sure the serial driver is initialized before relocation by tagging
the serial nodes with "bootph-all". Add these u-boot specific properties
to an *-u-boot.dtsi file.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:18 +08:00
Camelia Groza
387b89ac98 powerpc: dts: t2080rdb: add serial nodes
Add the serial node descriptions similar to Linux v6.4 for the t2080rdb
board and its dependencies.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:16 +08:00
Camelia Groza
b14f37c73f board: freescale: t2080rdb: implement get_serial_clock
The serial clock is provided by the get_serial_clock() callback on PPC
under DM_SERIAL. Use the same method to compute the clock as for
non-DM_SERIAL use cases.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:14 +08:00
Camelia Groza
a85b8c7539 board: freescale: t2080rdb: enumerate PCI devices
Call pci_init() to force PCI enumeration at probe time.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 16:54:12 +08:00
Venkatesh Yadav Abbarapu
4a31e14521 mtd: spi-nor: Add support for w25q256jwm
Add support for Winbond 256M-bit flash w25q256jwm.
Performed basic erase/write/readback operations on
ZynqMP zc1751+dc1 board.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 14:17:40 +05:30
Jim Liu
9b768bf0e3 spi: npcm_pspi: use ACTIVE_LOW flag for cs gpio and set default max_hz
If cs gpio is requested with ACTIVE_HIGH flag, it will
be pulled low(i.e. active). This is not what we expected.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 14:16:59 +05:30
Bruce Suen
41b5c79ea0 mtd: spi-nor-ids: add xtxtech part#
add following XTX part numbers to the list:

xt25f08: 3V QSPI, 8Mbit
xt25f16: 3V QSPI, 16Mbit
xt25f32: 3V QSPI, 32Mbit
xt25f64: 3V QSPI, 64Mbit
xt25f128: 3V QSPI, 128Mbit
xt25f256: 3V QSPI, 256Mbit
xt25q08: 1.8V QSPI, 8Mbit
xt25q16: 1.8V QSPI, 16Mbit
xt25q32: 1.8V QSPI, 32Mbit
xt25q64: 1.8V QSPI, 64Mbit
xt25q128: 1.8V QSPI, 128Mbit
xt25q256: 1.8V QSPI, 256Mbit
xt25q512: 1.8V QSPI, 512Mbit
xt25q01g: 1.8V QSPI, 1Gbit
xt25w512: wide voltage, QSPI, 512Mbit
xt25w01g: wide voltage, QSPI, 1Gbit

remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f
share same jdec id,we use xt25f128 instead.

Signed-off-by: Bruce Suen <bruce_suen@163.com>
[jagan: re-edited the entire patch]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 14:13:40 +05:30
Bruce Suen
3a4da23c8e mtd: spi-nor-ids: change full company name of XTX
XTX changed full company name from "XTX Technology (Shenzhen) Limited
to "XTX Technology Limited" since 2020,So remove "(Shenzhen)".

Signed-off-by: Bruce Suen <bruce_suen@163.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 14:00:39 +05:30
Fabio Estevam
a9ab9f7c37 doc: bindings: soft-spi: Remove the usage of deprecated properties
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:

sck-gpios, miso-gpios and mosi-gpios.

gpio-sck, gpio-mosi and gpio-miso are considered deprecated.

Update the bindings to suggest the recommeded properties.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 13:59:58 +05:30
Fabio Estevam
2e9fe73a88 spi: soft_spi: Support the recommended soft spi properties
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:

sck-gpios, miso-gpios and mosi-gpios.

gpio-sck, gpio-mosi and gpio-miso are considered deprecated.

Currently, U-Boot only supports the deprecated properties.

Allow the soft_spi driver to support both the new and old properties.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 13:59:57 +05:30
William Zhang
486f4d5a53 dt-bindings: spi: Add bcm63xx-hsspi controller support
Bring the device tree binding document from Linux to u-boot

Port from linux patches:
Link: https://lore.kernel.org/r/20230207065826.285013-2-william.zhang@broadcom.com
Link: https://lore.kernel.org/r/20230207065826.285013-3-william.zhang@broadcom.com
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 13:59:57 +05:30
Masahisa Kojima
1d70101aa2 spi: synquacer: remove SPI_TX_BYTE handling
Current code expects that SPI_TX_BYTE is single bit mode
but it is wrong. It indicates byte program mode,
not single bit mode.

If SPI_TX_DUAL, SPI_TX_QUAD and SPI_TX_OCTAL bits are not set,
the default transfer bus width is single bit.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-07-13 13:59:57 +05:30