Commit graph

34962 commits

Author SHA1 Message Date
Jagan Teki
11c579bc9c sf: Remove spi_flash_remove
Use direct call to device_remove instead of exctra
spi_flash_remove defination.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
6f3096585b sf: Rename bank_end to bar_end in read_bar
bar_end gives more meaningfull compared to bank_end and
spi_flash_write_bar uses bar_end so replaced bank_end with
bar_end in spi_flash_read_bar

Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
9275929c24 sf: Rename spi_flash_set_* functions
Since quad_mode functions are local to spi flash core,
rename them to a meaningful and readable names.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
d25dd94298 sf: Move spi_read_cmds_array locally
Since spi_read_cmds_array is used locally in
spi_flash_scan, so move array to locally used
function instead of defining global array.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
cdf3393814 spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUAD
Since SPI_TX_* are spi_slave{} members so use spi protocol
notation instead spi flash programming, like

SPI_TX_BP  => SPI_TX_BYTE
SPI_TX_QPP => SPI_TX_QUAD

Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
095a41d3c2 spi: Use mode instead of op_mode_tx
Used mode member from spi_slave{} instead of op_mode_tx.

Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
f5c3c033f7 spi: make mode visible to both dm and non-dm
Couldn't find the exact reason to define 'mode' for dm,
probably it is not using in non-dm drivers but it need
to visible both dm and non-dm as mode data is getting
dereferred in spi flash core ie common to both.

Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
e228d6deb1 sf: Get spi locally from spi_flash
For better code readabilty, get the spi pointer from
spi_flash{} locally and use it instead of direct
dereferring spi pinter as flash->spi->*

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Nathan Rossi
fc82edd844 arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs
This feature is required in SPL to enable support for loading from SPI
flash.

Also clean up the #define in socfpga_common.h.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin-Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13 13:20:03 +01:00
Nathan Rossi
47c0d79edc arm: mvebu: Select SPL_DM_SEQ_ALIAS
Select SPL_DM_SEQ_ALIAS which is required for certain uclasses,
specifically SPI Flash.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13 13:20:03 +01:00
Nathan Rossi
5c9b1d735e arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configs
This feature is required in SPL to enable support for loading from SPI
flash when the device is booted from QSPI.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13 13:20:02 +01:00
Nathan Rossi
4f627c5a59 spl: dm: Add SPL_DM_SEQ_ALIAS config option
The Device Model sequence alias feature is required by some Uclasses.
Instead of disabling the feature for all SPL targets allow it to be
configured.

The config option is disabled by default to reduce code size for targets
that are not interested or do not require this feature.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13 13:20:02 +01:00
Miao Yan
5c2ed61ce2 x86: qemu: add documentaion for the fw_cfg interface
Document the usage of 'qfw' command

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:16 +08:00
Miao Yan
3c30fd6ae2 x86: qemu: remove cpu node in device tree
Remove 'cpu' node in device tree for QEMU targets, and let U-Boot detect
and fix up those information at runtime.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:16 +08:00
Miao Yan
de752c5e73 x86: qemu: fix cpu device in smp boot
Currently, when booting with more that one CPU enabled, U-Boot scans
'cpu' node in device tree and calculates CPU number. This does not scale
well as changing CPU number also requires modifying .dts and re-compiling
U-Boot.

This patch uses fw_cfg interface provided by QEMU to detect online CPU
number at runtime, and dynamically adds 'cpu' device to U-Boot's driver
model.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:16 +08:00
Miao Yan
b28cecdfb8 x86: use actual CPU number for allocating memory
Use actual CPU number, instead of maximum cpu configured, to allocate
stack memory in 'load_sipi_vector'

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:15 +08:00
Miao Yan
24fb49073e x86: fix a typo in function name
Rename 'find_cpu_by_apid_id' to 'find_cpu_by_apic_id'. This should be a
typo.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:15 +08:00
Miao Yan
5a694056fe x86: qemu: add a cpu uclass driver for qemu target
Add a cpu uclass driver for qemu. Previously, the qemu target gets cpu
number from board dts files, which are manually created at compile time.
This does not scale when more cpus are assigned to guest as the dts files
must be modified as well.

This patch adds a cpu uclass driver for qemu targets to directly read
online cpu number from firmware.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:15 +08:00
Miao Yan
f60df20aa9 x86: qemu: add fw_cfg support
The QEMU fw_cfg interface allows the guest to retrieve various data
information from QEMU. For example, APCI/SMBios tables, number of online
cpus, kernel data and command line, etc.

This patch adds support for QEMU fw_cfg interface.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-13 12:20:15 +08:00
Miao Yan
ece5c37f0c x86: adjust ramdisk load address
By default, ramdisk load address is defined to 02000000 in env string.
When loading bzImage to 01000000 (default address), there's a chance that
the ramdisk header would be overwritten by the kernel. Thus increase the
gap and make ramdisk load at 04000000 by default and also this patch
introduces a new configuration item CONFIG_RAMDISK_ADDR for this purpose

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:15 +08:00
Bin Meng
87968de31d x86: ivybridge: Add macros for LPC decode ranges
Add several macros for LPC decode registers on PCH.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:15 +08:00
Bin Meng
59fb7fbd49 x86: fsp: Always use hex numbers in the hob command output
In the 'fsp hob' command output, decimal numbers and hexadecimal
numbers are used mixedly. Now change to always use hex numbers
to keep consistency.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:15 +08:00
Bin Meng
fa331fad1e x86: ivybridge: Do not require HAVE_INTEL_ME
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:15 +08:00
Bin Meng
33fb6c0100 x86: ivybridge: Add microcode blobs for all the steppings
This adds microcode blobs created from Intel FSP package for the
Chief River platform. They are for all the Ivy Bridge steppings:
306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the
306a9 which is already in the U-Boot tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:15 +08:00
Bin Meng
aefba6f1b5 tools: microcode-tool: Support parsing header file with a license block
The microcode header files in the Intel Chief River FSP package have
a license comment block. Update the microcode-tool to support parsing
it and extract the license text to the .dtsi file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
394e0b6624 fdtdec: Add compatible string for Intel IvyBridge FSP
Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
214feec1c5 x86: fsp: Set up init runtime buffer in update_fsp_configs()
fsp_init() runtime buffer parameter might be different across
different platforms. Move this to update_fsp_configs().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
4ce022d396 x86: fsp: Move struct fspinit_rtbuf definition to chipset header
All FSP spec v1.0 complaint FSP binary uses struct fspinit_rtbuf
as defined by the 1.0 spec, however there are FSPs that does not
follow 1.0 spec (possible due to that FSP predates the 1.0 spec),
and future FSP binary that is complaint to v1.1 spec defines an
optional paltform-specific runtime data in the struct fspinit_rtbuf.
Hence move the definition to chipset header.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
e293502280 x86: queensbay: Remove invalid comments in update_fsp_configs()
Those comments in update_fsp_configs() are not correct. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
3340f2cc0b x86: fsp: Introduce CONFIG_FSP_USE_UPD Kconfig option
Not every FSP supports UPD, thus we introduce a Kconfig option
CONFIG_FSP_USE_UPD and use it to wrap these common UPD handling
codes in fsp_support.c.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
81f84aa6c9 x86: fsp: Rename update_fsp_upd() and change its signature
To support platform-specific configurations (might not always be
UPD on some platform), use a better name update_fsp_configs() and
accepct struct fsp_config_data as its parameter so that platform
codes can handle whatever configuration data for that FSP.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
cb379a34c4 x86: fsp: Rename shared_data to fsp_config_data
FSP has several config data like UPD, HDA verb table which can be
overridden or provided by bootloader. Currently in U-Boot only UPD
is handled via struct shared_data. To accommodate any platform, we
rename shared_data to fsp_config_data and move the definition from
common place fsp_support.h to platform-specific place fsp_configs.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
57ac74ff04 x86: fsp: Add boot_mode as a member of struct shared_data
Save boot_mode in struct shared_data for future refactoring.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Bin Meng
f0285fbe4e x86: fsp: Avoid cast stack_top in struct shared_data
Declare stack_top as u32 in struct shared_data and struct common_buf
so that we can avoid casting in fsp_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:13 +08:00
Bin Meng
aa02446406 x86: fsp: Simplify fsp_continue()
There is no need to pass shared_data to fsp_continue() so we can
remove unnecessary codes that simplifies the function a lot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:13 +08:00
Tom Rini
077678eb0c Merge git://git.denx.de/u-boot-dm 2016-01-12 18:12:42 -05:00
Tom Rini
ab971e192a sandbox: eth-raw-os.c: Ensure that our interface name is not too long
Coverity notes that we do not ensure when we copy ifname we still have
space left to ensure NULL termination.  As cannot control the size of
ifr_name we must make sure that our argument will not overflow the
buffer.

Reported-by: Coverity (CID 131094)
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-12 10:19:09 -07:00
Stefan Roese
66eaea6cd1 dm: core: Add option to configure an offset for the address translation
Some platforms need to ability to configure an offset to the standard
addresses extracted from the device-tree. This patch allows this by
adding a function to DM to configure this offset (if needed).

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Fixed space before tab:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-12 10:19:09 -07:00
Simon Glass
9b20519887 rockchip: Use the debug UART on rk3036
Rather than using a new debug UART implementation, use the standard one
provided by U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-12 10:19:09 -07:00
Simon Glass
b7e29834f1 dm: ns16550: Allow the driver to be omitted if requested
Allow the ns16550 debug UART to be used without the full driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-12 10:19:09 -07:00
Simon Glass
92c55b682c dm: serial: Allow the UART driver to be dropped from the image
In very very space-constrained devices even the full UART driver is too
large. In this case the debug UART can still be used in some cases.

Add options to enable the UART driver in SPL and U-Boot proper. Enable both
options by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-12 10:19:09 -07:00
Simon Glass
d4f847ecd7 dm: net: usb: Convert mcs7830 driver to support driver model
Adjust this driver to support driver model for Ethernet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-12 10:19:09 -07:00
Simon Glass
ce932c7066 dm: net: usb: Refactor mcs7830 driver ready for DM conversion
Remove stamp data and create common functions for the main Ethernet
operations. This will make it easier to convert this driver to support
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-12 10:19:09 -07:00
Simon Glass
8bd42525fa pci: Tidy up comments in pci_bind_bus_devices()
The current comments are confusing. We don't actually bind a generic device
when the device tree has no information. We try to scan available PCI
drivers. Update the comments to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Simon Glass
4abe8e40a7 dm: Convert PCI MMC over to use DM PCI API
At present pci_mmc_init() does not correctly use the PCI function since the
list it passes is not terminated. The array size passed to pci_mmc_init() is
actually not used correctly. Fix this and adjust the pci_mmc_init() to scan
all available MMC devices.

Adjust this code to use the new driver model PCI API.

This should move over to the new MMC uclass at some point.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Simon Glass
09c5c16455 dm: usb: Convert echi-pci to use new DM PCI API
Convert this driver to use the new driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-01-12 10:19:09 -07:00
Simon Glass
ff758ccc8a dm: ahci: Convert to use new DM PCI API
Convert this driver to use the new driver model PCI API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Simon Glass
7e78b9ef2c dm: pci: Switch to DM API for PCI address mapping
We should use the new address mapping functions unless we are in
compatibility mode. Disable the old functions by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Simon Glass
552ddbe3ce dm: net: Convert rtl8169 to use DM PCI API
Update this driver to use the proper driver-model PCI API functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-12 10:19:09 -07:00
Simon Glass
21d1fe7ec2 dm: pci: Add driver model API functions for address mapping
At present the PCI address map functions use the old API. Add new functions
for this so that drivers can be converted.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00