This commit fixes a number of issues with the reset sequence of musb-new
in host mode:
1) Our usb device probe relies on a second device reset being done after the
first descriptors read. Factor the musb reset code into a usb_reset_root_port
function (and add this as an empty define for other controllers), and call
this when a device has no parent.
2) Just like with normal usb controllers there needs to be a delay after
reset, for normal usb controllers, this is handled in hub_port_reset, add a
delay to usb_reset_root_port.
3) Sync the musb reset sequence with the upstream kernel, clear all bits of
power except bits 4-7, and increase the time reset is asserted to 50 ms.
With these fixes an usb keyboard I have now always enumerates properly, where
as earlier it would only enumerare properly once every 5 tries.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This is based on Jussi Kivilinna's work for the linux-sunxi-3.4 kernel to use
the kernels musb driver instead of Allwinners own custom driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Currently create_int_queue is only implemented by the ehci code, and that
does not honor interrupt intervals, but other drivers which might also want
to implement create_int_queue may honor intervals, so add an interval param.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Now that "usb start" will only start usb if not already started, we can simply
call "usb start" whenever we (may) need access to usb devices, and it will only
actually scan the bus at the first call.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This does nothing now, so drop it. We have SPL anyway to do our low-level
init.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This patch adds a driver for VSC9953 L2 Switch. This Vitesse IP
is integrated in Freescale T1040 and T1020 SoCs.
The L2 switch has 10 Ethernet ports: 2 internal fixed-links
(ports 8 and 9) at 2.5 Gbps and and 8 external ports at 1 Gbps.
The external ports may be connected to PHYs over QSGMII and SGMII.
Commands have also been added to enable/disable a port and to
check a port's link speed, duplexity and status. The commands are:
ethsw port <port_nr> enable|disable - enable/disable an l2 switch port
ethsw port <port_nr> show - show an l2 switch port's configuration
port_nr=0..9; use "all" for all ports
For more detailse please see doc/README.t1040-l2switch
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch supports AQ1202, AQ2104, AQR105 PHY.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T1024RDB-PB board adds 2.5G SGMII support with AQR105 PHY.
rcw_0x095 is used for 10G XFI + 3x PCIex1
rcw_0x135 is used for 2.5G SGMII + 2x PCIex1
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Besides, added SPI/SD/NAND boot deep sleep support.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
CONFIG_BOOTDELAY is missing from board header file. Add this macro
to enable counting down of auto boot.
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
[York Sun: Add commit message]
Reviewed-by: York Sun <yorksun@freescale.com>
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
All the 74xx_7xx boards are still non-generic boards:
P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
It makes sense to specify CONFIG_SYS_CLK_FREQ in "configs/xx_defconfig"
instead of "include/configs/xxx.h" because then header will be reusable
across boards with different CPU clocks.
Also this nice to have an ability for end user to tune this value
himself via "menuconfig".
For now I'm only applying this change to all ARC configs because
otherwise scope of change will be huge.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Hans de Goede <hdegoede@redhat.com>
cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Add separate image type for the Wittenstein OpenRTOS .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some MTD defines are repeated twice; once with UBI and then with MTD.
Remove the duplicate MTD defines from the UBI grouping.
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Export this function for testing. Also add a parameter so that values other
than CONFIG_SYS_BOOTM_LEN can be used for the maximum uncompressed size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most of the usb-controller init code found in ehci-sunxi.c also is necessary
to init the otg usb controller, so move it to a common place.
While at it also update various #ifdefs / defines for sun8i support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The axp221 / axp223's N_VBUSEN pin can be configured as an output rather
then an input, add axp_drivebus_enable() and _disable() functions to set
the pin in output mode and control it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This allows to always have a complete log on the VGA/HDMI/LCD console.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Before video output support can be enabled on the A13-OLinuXinoM, bootm_size
must first be reduced to take into account that the framebuffer is shaved of
the top of the DRAM. For other boards this is not an issue since bootm was set
to 256M and all boards have at least 512M except for the A13-OLinuXinoM.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Some boards use GPIO-s on the pmic, one example of this is the A13-OLinuXino
board, which uses gpio0 of the axp209 for the lcd-power signal.
This commit adds support for gpio pins on the AXP209 pmic, the sunxi_gpio.c
changes are universal, adding gpio support for the other AXP pmics (when
necessary) should be a matter of adding the necessary axp_gpio_foo functions
to their resp. drivers, and add "#define AXP_GPIO" to their header file.
Note this commit only adds support for the non device-model version of the
gpio code, patches for adding support to the device-model version are very
welcome.
The string representation for these gpio-s is AXP0-#, the 0 in the AXP0 prefix
is there in case we need to support gpio-s on more then 1 pmic in the future.
At least A80 boards have 2 pmics, and we may end up needing to support gpio-s
on both.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add DDC & EDID support and use it to automatically select the native mode of
the attached monitor. This can be disabled by adding edid=0 as option
to the video-mode env. variable.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Anatolij Gustschin <agust@denx.de>
Add support for the standard video-mode environment variable using the
videomodes.c video_get_ctfb_res_modes() helper function.
This will allow users to specify the resolution e.g. :
setenv video-mode sunxi:video-mode=1280x1024-24@60
saveenv
Also make the reserved fb mem slightly larger to allow 1920x1200 to work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Anatolij Gustschin <agust@denx.de>
Switch from fb_videomode to ctfb_res_modes and use the predefined videotimings
from videomodes.c, rather then defining our own.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Anatolij Gustschin <agust@denx.de>
Add a struct describing the (fixed) bits of cea681 edid extension blocks,
and defines for accessing various bitfields.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Add a helper function to check the checksum of an EDID data block.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Add a video_edid_dtd_to_ctfb_res_modes helper function to convert an EDID
detailed timing to a struct ctfb_res_modes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
The CONFIG_UART0_PORT_F option has been supported since
http://git.denx.de/?p=u-boot.git;a=commit;h=ff2b47f6a9cc1025
This option is primarily useful only for low level u-boot debugging
on tablets, where normal UART0 is difficult to access and requires
device disassembly and/or soldering.
This patch now allows it to be selected from menuconfig. A dependency on
SPL_FEL is added because u-boot does not support booting from NAND yet
and also booting from SD card is impossible when a MicroSD breakout board
is plugged into the SD slot.
Additionally a compilation problem is fixed:
common/spl/built-in.o: In function `spl_mmc_load_image':
/tmp/u-boot-sunxi/common/spl/spl_mmc.c:94: undefined reference to `mmc_initialize'
/tmp/u-boot-sunxi/common/spl/spl_mmc.c:96: undefined reference to `find_mmc_device'
/tmp/u-boot-sunxi/common/spl/spl_mmc.c:104: undefined reference to `mmc_init'
scripts/Makefile.spl:206: recipe for target 'spl/u-boot-spl' failed
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Based on the register / dram_para headers from the Allwinner u-boot / linux
sources + the init sequences from boot0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Explicitly turn off unused voltages, rather then leaving them as is. Likewise
explictly enabled the dcdc convertors, rather then assuming they are already
enabled at boot.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The axp223 appears to be the same as the axp221, except that it uses the
rsb to communicate rather then the p2wi. At least all the registers we use
are 100% the same.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
For sun6i the SID is stored in the pmic, rather then in the SoC itself,
add a function to retreive the sid.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Add netargs and netboot option.
* This enables tftp and nfs booting
* This puts omap5 devices inline with other devices such as am335x and am437x
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
AM43xx Industrial Development Kit is a new board
based on AM437x line of SoCs. Targetted at Industrial
Automation applications, it comes with EtherCAT, motor
control and other goodies.
Thanks to James Doublesin for all the help.
Cc: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This regulator is used with AM437x IDK to feed
VDD_MPU, without means to scale VDD_MPU we can't
support higher frequencies.
Signed-off-by: Felipe Balbi <balbi@ti.com>
DCDC1 is used as VDD_MPU in all known boards,
let's define all other valid voltages for that
rail so it can be used by our boards.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Enable GPMC's prefetch feature for NAND access. This speeds up NAND read
access a lot by pre-fetching contents in the background and reading them
through the FIFO address.
The current implementation has two limitations:
a) it only works in 8-bit mode
b) it only supports read access
Both is easily fixable by someone who has hardware to implement it.
Note that U-Boot code uses non word-aligned buffers to read data into, and
request read lengths that are not multiples of 4, so both partial buffers
(head and tail) have to be addressed.
Tested on AM335x hardware.
Tested-by: Guido Martínez <guido@vanguardiasur.com.ar>
Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar>
Signed-off-by: Daniel Mack <zonque@gmail.com>
[trini: Make apply again, use 'cs' fix pointed out by Guido]
Signed-off-by: Tom Rini <trini@ti.com>
CONFIG_DISPLAY_CPUINFO is already defined in x86-common.h, so remove
it to avoid duplication.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link
which is currently the only real board officially supported to run
U-Boot loaded by coreboot.
Note the symbolic link file chromebook_link.dts is deleted and
link.dts is renamed to chromebook_link.dts.
To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86
define needs to be moved to arch/x86/cpu/ivybridge/Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Since we already swtiched to use the new mechanism for building
U-Boot for coreboot, coreboot.h is no longer needed so remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that
we don't need them in the board configuration file thus the same
board configuratoin file can be used to build both coreboot version
and bare version.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
There are many places in the U-Boot source tree which refer to
CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT
that is currently defined in coreboot.h.
Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch
to board configuration file to build U-Boot later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configuration file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit adds several APIs to decode PCI device node according to
the Open Firmware PCI bus bindings, including:
- fdtdec_get_pci_addr() for encoded pci address
- fdtdec_get_pci_vendev() for vendor id and device id
- fdtdec_get_pci_bdf() for pci device bdf triplet
- fdtdec_get_pci_bar32() for pci device register bar
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
Introduce a gd->hose to save the pci hose in the early phase so that
apis in drivers/pci/pci.c can be used before relocation. Architecture
codes need assign a valid gd->hose in the early phase.
Some variables are declared as static so change them to be either
stack variable or global data member so that they can be used before
relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which
just affects some print format.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Convert Extreme Engineering Solutions products to use generic board
support.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
When CONFIG_TRACE is disabled, linking fails with:
common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init'
To fix, wrap trace init calls with #ifdef CONFIG_TRACE.
While at it, remove the static inline version of the init call from
trace.h as suggested by Simon Glass, since it doesnt work.
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
common/lcd.c is a mix of code portions that do different but related
things. To improve modularity, the various code portions should be split
into their own modules. Separate lcd console code into its own file.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Introduce lcd_getbgcolor() and lcd_getfgcolor(), and use them where
applicable.
This is a preparatory step for extracting lcd console code into its own
file.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
No one is using LCD_MONOCHROME; remove related code.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Boot from SD-card (and probably also from NAND) was broken since
commit d6d07a9bec ("arm: vf610: add NAND support for vf610twr").
It looks like the increased size of U-Boot lead to a situation
where the boot ROM overwrote its own stack/heap while loading
U-Boot from the SD-card to the SRAM. However, U-Boot worked fine
when loaded through USB serial loader directly into SRAM. It
looks like loading from SD-card uses other stack/heap location
then the serial loader (or maybe no stack or heap at all).
This fix moves U-Boot to gfxRAM, which is 512kB in size and is not
used by the boot ROM nor the SD-card loader of it.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver.
In order to count the time, add CONFIG_CMD_TIME.
Using AHB read can improve the the read speed about 30%.
AHB read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.174 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.174 seconds
IP read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.227 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.227 seconds
Note:
Quad read is not supported in driver, now. In my side, using AHB and Quad read
can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using
DTB and DM, then make the code cleaner and more feature can be added.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
mx6sxsabresd revb board uses 32MB qspi flash, reva board uses 16MB qspi
flash. Currently, the default supported platform is revb board.
If want to configure for reva board, just define CONFIG_MX6SX_SABRESD_REVA
in mx6sxsabresd.h to support reva qspi flashes whose size is 16MB.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This fixes us never programming ALDO2, and programming the ALDO2 voltage
into ALDo1.
Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Get about 40x faster access on SHEEVAPLUG MMC
Fix some SD type compatibility
Changes in v3:
- fix the HW_STATE (from linux mvsdio)
- review delays and timeouts
Changes in v2:
- increase number of loops
- remove initial delay
Changes in v1:
- review all loops, delays and timeouts
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
NFS is useful for loading zImage and dts through
NFS export. It saves us from running two services
for loading files over the network (tftp and nfs).
Signed-off-by: Felipe Balbi <balbi@ti.com>
Extract controller reset code from ahci_host_init() into separate
ahci_reset().
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
Add defines to use CONFIG_SYS_GENERIC_BOARD and CONFIG_OF_LIBFDT.
Semi-separate to this: the size of the image for the da850evm has
increased to the point that the size in da850evm.h and the offset for
the environment in SPI flash no longer work. They are modified to
account for the larger image size.
Signed-off-by: Peter Howard <phoward@gme.net.au>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Enable UUID and partition support for scripted handling platforms with
MMC and eMMC and varied partitioning schemes
And remove it from headers that end up redefining it.
Signed-off-by: Nishanth Menon <nm@ti.com>
All the MPC824X boards are still non-generic boards:
A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Torsten Demke <torsten.demke@fci.com>
Cc: Jim Thompson <jim@musenki.com>
Cc: Greg Allen <gallen@arlut.utexas.edu>
These boards are still non-generic boards.
drivers/rtc/ds12887.c should also be removed because it can not
be built without CONFIG_ATC.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
This board is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
This board is still a non-generic board.
Unused code in arch/powerpc/cpu/mpc8xx/video.c should be also deleted
because CONFIG_VIDEO_ENCODER_AD7176, CONFIG_VIDEO_ENCODER_AD7177,
CONFIG_VIDEO_ENCODER_AD7179 are not defined any more.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
These boards are still non-generic boards.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
This patch adds driver support for the ASIX AX88179 USB3.0 to GbE network
adapter.
Driver has been tested on the RECS5250 COM module (similar to ARDALE5250).
Testcase was DHCP and PXE boot.
Signed-off-by: Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
Add spi nor boot support for mx6slevk board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Configure the pad setting and enable qspi clock to support qspi
flashes access.
Add QSPI related macro in configuration header file.
Note:
mx6sxsabresd Revb board, 32M flash is used, but in header file,
CONFIG_SPI_FLASH_BAR is not defined, and we still use SZ_16M.
The LUT initialization qspi_set_lut function uses 32BIT addr,
however CONFIG_SPI_FLASH_BAR and 24BIT addr should be used to
access bigger than 16MB size flash, and BRRD/BRWR should also
be supported. Future patches will fix this.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Repair the register configuration and add proper support for the
display attached to both LVDS channels.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Sequence like the following is completely useless and results from
an errorneous ordering of the statements during development. Zap it.
#ifdef FOO
#define FOO
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Since the Riot & Mars boards are dev boards it's likely people will want to
run standard distros on them. So replace the current boot scripts with the
standard one from config_distro_bootcmd.h
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
Update to use config_distro_defaults.h and remove explicit settings
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
USB is a pretty common feature on exynos 5 board, so it seems sensible
to configure it directly from exynos5-common. As a side-effect this
makes USB available from u-boot on exynos 5420 based boards.
While there enable support for common USB ethernet cards to make it more
likely the default config allows booting for network and enable XHCI on
SMDK5420 which has it defined in the dts but not in its config.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The few Versatile Express ARMv8 platforms we have may just as
well be switched to generic board from the beginning.
Tested on the ARM foundation model and the in progress support
for the ARMv8 Juno board.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Steve Rae <srae@broadcom.com>
Add samsung,vbus-gpio information for the XU3. This allows the usage of
the EHCI controller on the XU3, which is connected to the SMSC LAN9514
chip (usb hub + network).
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Not all exynos 5420 based devices with an LCD also have a parade LVDS
bridge. So make sure compilation doesn't break if CONFIG_LCD is enabled
and CONFIG_VIDEO_PARADE is not.
As a side-effect move the parade functions from the exynos system header
file to its own file.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds support for Odroid-XU3.
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The media for boot and environment is a board-specific feature, not a
processor-specific. This is same to console port number and some
other addresses. This patch moves the that kinds of configs to each
board-specific files from the common config file for Exynos5420.
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The current current watchdog timeout of 12 seconds is a bit small for
booting into Linux, especially when using a NFS based rootfs. So lets
change this timeout to a more defensive value of 30 seconds.
Also we now call the hw_watchdog_init() function so that we override
the value already configured from the Preloader.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Some boards, most notably those with a PCIe ethernet NIC, require this
to avoid cache coherency problems. Since the option adds very little
code and overhead enable it across all Tegra generations. Other drivers
may also start supporting this functionality at some point, so enabling
it now will automatically reap the benefits later on.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes
the second root port to a miniPCIe slot. Enable the PCIe controller and
the network driver to allow the device to boot over the network.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Beaver has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network device driver so that the device can
boot over the network.
In addition the board has a mini-PCIe expansion slot.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC
is available on the dock over the PCIe bus. Enable the PCIe controller
and the network device driver so that the device can boot over the
network.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add the device tree node for the PCIe controller found on Tegra30 SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network driver so that the device can boot over
the network.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add the device tree node for the PCIe controller found on Tegra20 SoCs.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.
This is based on the Linux kernel driver, originally submitted upstream
by Mike Rapoport.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.
Tegra20 and Tegra30 also provide weak symbols for these functions so
that drivers can use the same API irrespective of which SoC they're
being built for.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The AS3722 provides a number of DC/DC converters and LDOs as well as 8
GPIOs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The normal image is working on DRAM. It is better to use DRAM also
for init stack than L2 cache.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Additionally, prepare and write the Backup GUID Partition Table.
Signed-off-by: Steve Rae <srae@broadcom.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[Test HW: Exynos4412 - Trats2]
In order to add detach functions for fastboot, make the DFU detach related
functions common so they can be shared.
Signed-off-by: Rob Herring <robh@kernel.org>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[TestHW: Exynos4412-Trats2]
A new interface is introduced to support generic board structure.
Converts it to use new interface.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Following boards has incorrect number of portals defined.
powerpc/T102xQDS
powerpc/T102xRDB
powerpc/T1040QDS
powerpc/T104xRDB
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is required when supporting power management.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add following configs in header file:
CONFIG_SYS_GENERIC_BOARD
CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Use asmlinkage defined in include/linux/linkage.h if necessary.
Actually no ARM board uses asmlinkage, so this commit has no impact.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Commit 65dd74a674 (x86: ivybridge: Implement SDRAM init) introduced
x86-specific asmlinkage into arch/x86/include/asm/config.h.
Commit ed0a2fbf14 (x86: Add a definition of asmlinkage) added the
same macro define again, this time, into include/common.h.
(Please do not add arch-specific stuff to include/common.h any more;
it is already too cluttered.)
The generic asmlinkage is defined in <linux/linkage.h>. If you want
to override it with an arch-specific one, the best way is to add it
to <asm/linkage.h> like Linux Kernel.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Enabled byte program support for sst flashes in sf.
Few controllers will only support BP, so this patch gives
a tx transfer flag to set the BP so-that sf will operate
on byte program transfer.
A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
If the MMC_MODE_DDR_52MHz flag is set in card capabilities bitmask,
it is never cleared, even if switching to DDR mode fails, and if
the controller driver uses this flag to check the DDR mode, it can
take incorrect actions.
Also, DDR related checks in mmc_startup() incorrectly handle the case
when the host controller does not support some bus widths (e.g. can't
support 8 bits), since the host_caps is checked for DDR bit, but not
bus width bits.
This fix clearly separates using of card_caps bitmask, having there
the flags for the capabilities, that the card can support, and actual
operation mode, described outside of card_caps (i.e. bus_width and
ddr_mode fields in mmc structure). Separate host controller drivers
may need to be updated to use the actual flags. Respectively,
the capabilities checks in mmc_startup are made more correct and clear.
Also, some clean up is made with errors handling and code syntax layout.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
if the card claims to be high capacity and the card
is partitioned the capacity shall still be read from
ext_csd SEC_COUNT even if the resulting capacity is
smaller than 2 GiB
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Earlier commit 73a1cb27 mistakenly used CONFIG_SYS_TIMER_CLK_FREQ.
It should be CONFIG_TIMER_CLK_FREQ.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
[York Sun: This is the difference between two patch versions]
Reviewed-by: York Sun <yorksun@freescale.com>
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
- CONFIG_SYS_I2C_INIT_BOARD
- CONFIG_I2C_MULTI_BUS
- CONFIG_SYS_MAX_I2C_BUS
- CONFIG_SYS_I2C_SPEED
- CONFIG_SYS_I2C
This has been tested on:
- trimslice (no I2C)
- beaver
- Jetson-TK1
It has not been tested on Tegra 114 as I don't have that board.
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Nyan-big is a Tegra124 clamshell board that is very similar to venice2, but
it has a different panel, the sdcard cd and wp sense are flipped, and it has
a different revision of the AS3722 PMIC.
This is the Acer Chromebook 13 CB5-311-T7NN (13.3-inch HD, NVIDIA
Tegra K1, 2GB). The display is not currently supported, so it should
boot on other nyan-based Chromebooks also, but only the device tree for
nyan-big is provided here.
The device tree file is from Linux but with features removed which are
unlikely to be supported in U-Boot soon (regulators, pinmux). Also the
addresses are updated to 32-bit.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
(rebase, change to 'nyan-big', fix pinmux that resets nyan-big)
Sync this up with Linux v3.18-rc5. Exclude features that are unlikely to
supported in U-Boot soon (regulators, pinmux). Also the addresses are
updated to 32-bit. Otherwise it is the same. Also bring in the dt-bindings
for pinctrl.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Enable the options to bring up I2C on sandbox. Also enable all the available
I2C commands for testing purposes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
In order to test I2C we need some sort of emulation interface. Add hooks
to allow a driver to emulate an I2C device for sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The uclass implements the same operations as the current I2C framework but
makes some changes to make it fit driver model better:
- Remove the chip address from API calls
- Remove the address length from API calls
- Remove concept of 'current' I2C bus
- Drop all existing init functions
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The functions error's numbers are standarized - but the error
messages are not.
The errors are often handled with unclear error messages,
so why not use an errno standarized messages.
Advantages:
- This could decrease the binary size.
- Appended with a detailed information,
the error message will be clear.
This commit introduces new function:
- const char *errno_to_str(int errno)
The functions returns a pointer to the errno corresponding text message:
- if errno is null or positive number - a pointer to "Success" message
- if errno is negative - a pointer to errno related message
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Tom Rini <trini@ti.com>
Adjust the configuration to use the driver model version of the pl01x
serial driver. Add the required platform data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Move strlcpy() definition from drivers/usb/gadget/ether.c to
lib/string.c because it is a very useful function.
Let's add the prototype to include/linux/string.h too.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The Central Security Unit (CSU) allows secure world software to
change the default access control policies of peripherals/bus
slaves, determining which bus masters may access them. This
allows peripherals to be separated into distinct security domains.
Combined with SMMU configuration of the system masters privileges,
these features provide protection against indirect unauthorized
access to data.
For now we configure all the peripheral access permissions as R/W.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
For some SoCs, the system clock frequency may not equal to the
ARCH Timer's frequency.
This patch uses the CONFIG_TIMER_CLK_FREQ instead of
CONFIG_SYS_CLK_FREQ, then the system clock macro and arch timer
macor could be set separately and without interfering each other.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
With the introducing of generic board and ARM-based cores, current
deep sleep framework doesn't work anymore.
This patch will convert the current framework to adapt this change.
Basically it does:
1. Converts all the Freescale's DDR driver to support deep sleep.
2. Added basic framework support for ARM-based and PPC-based
cores separately.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Check USB Erratum A007792 applicability. If applicable, add
corresponding property in the device tree via device tree fixup
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds NAND boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from NAND flash to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The SD/NAND/QSPI boot definations are wrong for QE support, this
patch is to fix this error.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch will fix the bug that the partitions on the SD card could
not be accessed and add the support for the FAT fs.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Alt board has been connected to eMMC of 8GB to MMC port.
This enables MMC port and MMC command.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Lager board has been connected to eMMC of 8GB to MMC1 port.
This enables MMC1 port and MMC command.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Board with R-Car SoC has USB and MMC. They might use the EXT2 or EXT4 file system.
This adds support ext2 and ext4 file system
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
stv0991 architecture support added. It contains the support for
following blocks
- Timer
- uart
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Add arch/arm/cpu/armv7/Makefile hunk]
Signed-off-by: Tom Rini <trini@ti.com>
Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to. So, run-time
detection of the number of flash banks would be more user-friendly.
Until this commit, UniPhier boards have achieved this by (ab)using
board_flash_wp_on() because the boot failed if flash_size got zero.
Fortunately, this problem was solved by commit 70879a9256 (flash:
do not fail even if flash_size is zero).
Now it is possible to throw away such a tricky workaround. This
commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further
refactoring.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
__user and __iomem are defined in include/linux/compiler.h.
MAX_ERRNO is defined in include/linux/err.h.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The CPU directory of IMX6 is arch/arm/cpu/armv7, so setting
CONFIG_SPL_START_S_PATH to arch/arm/cpu/armv7 is totally redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefano Babic <sbabic@denx.de>
The CPU directory of this board is arch/powerpc/cpu/mpc5xxx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
The CPU directory of this board is arch/powerpc/cpu/ppc4xx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This board sprinkles #ifdef(CONFIG_HERMES) over various global files
such as include/common.h, common/board_r.c, common/cmd_bdinfo.c.
Let's zap such an ill-behaved board.
It has not been converted to generic board yet and mpc8xx is old
enough.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Enable ENV_IS_IN_FAT so that the environment can be stored persistently.
It's stored in the FAT partition that the RPi firmware requires. On most
RPis, this is on the SD card (which must be present in order for the
system to boot). On the CM this is on the built-in eMMC device.
Since we now have a persistent environment, there's no need to load
uEnv.txt at boot; we only did that to work around the lack of persistent
environment.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The U-Boot port runs on a variety of RPi models, not just the B. So,
rename the port to something slightly more generic.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Detect the board revision early during boot, and print the decoded
model name.
Eventually, this information can be used for tasks such as:
- Allowing/preventing USB device mode; some models have a USB device on-
board so only host mode makes sense. Others connect the SoC directly
to the USB connector, so device-mode might make sense.
- The on-board USB hub/Ethernet requires different GPIOs to enable it,
although luckily the default appears to be fine so far.
- The compute module contains an on-board eMMC device, so we could store
the environment there. Other models use an SD card and so don't support
saving the environment (unless we store it in a file on the FAT boot
partition...)
Set $fdtfile based on this information. At present, the mainline Linux
kernel doesn't contain a separate DTB for most models, but I hope that
will change soon.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
and smaller. Now is a good time to merge them into a single file.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better described by the "choice" menu of Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Remove the now unnecessary clocking info from the SoCFPGA
config header. As this info in now used directly in the SPI driver
itself.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Enable support for the DW master SPI controller in the config header
for the SoCFPGA. This controller can only be enabled, if DT support
is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
With this driver enabled for SoCFPGA, access to SPI NOR flash is
supported.
The configuration (page size, timing info) will be taken from the
DT. See socrates as an example.
This QSPI supports depends on DT. So QSPI is only enabled if
CONFIG_OF_CONTROL is defined (see socfpga_socrates_defconfig).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
The SD supply Voltage was 3.3V on T4240RDB, so enabled 3.3V support for eSDHC.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Wujie Qiu <B49553@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below:
10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2
on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below:
10GEC1->MAC1, 10GEC2->MAC2
so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on
which 10GEC enumeration is consistent with MAC enumeration.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T1024RDB is a Freescale Reference Design Board that hosts the T1024 SoC.
T1024RDB board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3L SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- one 10Gbps XFI interface
- PCIe: Three PCIe controllers: one PCIe Slot and two Mini-PCIe connectors.
- SerDes: 4 lanes up to 10.3125GHz
- IFC: 128MB NOR Flash, 512MB NAND Flash and CPLD
- eSPI: 64MB N25Q512 SPI flash.
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- USB: Two Type-A USB2.0 ports with internal PHY
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC
- I2C: Four I2C controllers
- UART: Two UART serial ports
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
T1024QDS is a high-performance computing evaluation, development and
test platform for T1024 QorIQ Power Architecture processor.
T1024QDS board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- Three 1G/2.5Gbps SGMII ports
- Four 1Gbps QSGMII ports
- one 10Gbps XFI or 10Base-KR interface
- SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora
- PCIe: Three PCI Express controllers with five PCIe slots.
- IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- Video: DIU supports video up to 1280x1024x32 bpp.
- Chrontel CH7201 for HDMI connection.
- TI DS90C387R for direct LCD connection.
- Raw (not encoded) video connector for testing or other encoders.
- QUICC Engine block
- 32-bit RISC controller for flexible support of the communications peripherals
- Serial DMA channel for receive and transmit on all serial channels
- Two universal communication controllers, supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- eSPI: Three SPI flash devices.
- SATA: one SATA 2.O.
- USB: Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC.
- I2C: Four I2C controllers.
- UART: Two UART on board.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
XFI does not work stable on current board, it's due to heat sink issue,
to make it work stable the board needs additional heat sink, enable two
XFI lanes only. Right now we do not have such an erratum for the issue,
so use a define CONFIG_SYS_FSL_B4860QDS_XFI_ERR to identify it.
The workaround will only be used in XFI protocols and only if the
hwconfig indicates that XFI is prefered.
A new VSC3308 config function is used instead of re-use the original
function, to avoid making the function complex and ugly.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Convert T1040QDS and T1040RDB to use generic board code.
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware from NOR/NAND/SPI/SD device
to initialize Cortina PHY.
- Cortina PHY has non-standard offset of PHY ID registers, thus
we define own get_phy_id() to override default get_phy_id().
- To define macro CONFIG_PHY_CORTINA will enable this driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add configs:
o CONFIG_SYS_GENERIC_BOARD
o CONFIG_DISPLAY_BOARDINFO
in C29XPCIE config header file to use U-boot generic
board code.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add configs:
o CONFIG_SYS_GENERIC_BOARD
o CONFIG_DISPLAY_BOARDINFO
in P1023RDB config header file to use U-boot generic
board code.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
cppcheck reports:
[board/muas3001/muas3001.c:270]: (error) Uninitialized variable: psize
remove the CONFIG_SYS_RAMBOOT define to prevent this error report.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reported-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: York Sun <yorksun@freescale.com>
This define is never set in our setup, so we can remove it safely. The
former code causes cppcheck to complain about:
[board/keymile/km82xx/km82xx.c:311]: (error) Uninitialized variable:
psize
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: York Sun <yorksun@freescale.com>
Use generic board architecture for p1010rdb, tested with NOR
boot on p1010rdb-pb.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The define CONFIG_FSL_SATA_V2 is missing, so SATA is not available
in U-boot.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Use generic board architecture for p1025-twr, tested with NOR
boot and NAND boot on p1025-twr.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage output
value of an external voltage regulator.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Enable interactive debugging by default. Remove DDR controller interleaving
because this SoC only has one controller. Use auto chip-select interleaving
to detect number of ranks.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.
Also update single-rank 1866 timing. Enable interactive debugging as well.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
add FIT support and set "boardid" from factoryset records
"DEV/id" and "COMP/ver". "boardid" is used for selecting
which fit configuration gets booted on the board.
Signed-off-by: Heiko Schocher <hs@denx.de>
CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION ought to be called
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to keep it consistent with other config
options such as: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR.
In addition, it is not related to raw mode booting but to fs mode instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC1 and VMMC2, in doubt.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
Some devices may use non-standard combinations of regulators to power MMC:
this allows these devices to provide a board-specific MMC power init function
to set everything up in their own way.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
BeagleBoard-X15 is the next generation Open Source
Hardware BeagleBoard based on TI's AM5728 SoC
featuring dual core 1.5GHZ A15 processor. The
platform features 2GB DDR3L (w/dual 32bit busses),
eSATA, 3 USB3.0 ports, integrated HDMI (1920x108@60),
separate LCD port, video In port, 4GB eMMC, uSD,
Analog audio in/out, dual 1G Ethernet.
For more information, refer to:
http://www.elinux.org/Beagleboard:BeagleBoard-X15
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
just add a few ifdefs around because this
device is very similar to dra7xxx.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
* Since the emmc isn't always programed trying to load the fs from the
emmc causes boot failures/kernel panic.
* The current bootcmd is set to:
bootcmd=run findfdt; run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; \
setenv mmcroot /dev/mmcblk0p2 rw; run mmcboot;
My guess is the env variables should be set so that sd card boot
(dt,kernel,fs) is the default and then fallback to emmc if it fails (no
sd card detected)
The current bootcmd attempts to set mmcroot to the sd card rootfs but
that code doesn't run due to mmcboot being ran early on.
Signed-off-by: Franklin Cooper Jr. <fcooper@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Out of all OMAP5-like boards, only one of them
needs CONFIG_MISC_INIT_R, so it's best to enable
that for that particular board only, instead of
enabling for all boards unconditionally.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the characters of the error message:
"Unknown command '' - try 'help'".
Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the characters of the error message:
"Unknown command '' - try 'help'".
Provide a default size for CONFIG_SYS_PBSIZE so that it can store the error
message and allows the error message to be printed correctly with no hang.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
With enabled console_mux for serial input and usb keyboard sometimes
characters get lost when typing too fast at the serial input (pasting
strings in serial console window). Fix this by using INT_QUEUE for
polling the usb keyboard.
Signed-off-by: Soeren Moch <smoch@web.de>
Add thermal support so that the temperature of the chip can be displayed on
boot:
U-Boot 2015.01-rc1-18268-g1366c05-dirty (Nov 25 2014 - 13:02:42)
CPU: Freescale i.MX6SX rev1.0 at 792 MHz
CPU: Temperature 50 C
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
The fdt_path_offset() checks an alias too.
fdtdec_get_alias_node(blob, "foo") is equivalent to
fdt_path_offset(blob, "foo").
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
As well as locating the ROM on the PCI bus, allow the ROM to be supplied to
the emulator. Split the init up a little so that callers can supply their
own interrupt routines. Also allow a vesa mode to be provided, to be
selected once the BIOS run is complete.
Signed-off-by: Simon Glass <sjg@chromium.org>
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.
Even now, these ROMs are supplied as a way to set up video. It avoids the
code for every video chip needing to be provided in the boot loader. But
it makes the video much less flexible - e.g. it is not possible to do
anything else while the video init is happening (including waiting hundreds
of milliseconds for display panels to start up).
In any case, to deal with this sad state of affairs, provide an API for
execution of x86 video ROMs, either natively or through emulation.
Signed-off-by: Simon Glass <sjg@chromium.org>
For option ROMs we can use these extensions to request a particular video
mode. Add a header file which defines the binary interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable this option so that we can configure the available PCI devices. Also
make sure that PCI is available early after relocation as we use it for
several other subsystems.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is not needed. Remove it to improve the generic init sequence
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This new symbol may be defined by the compiler. If it is, avoid a compiler
warning when USE_STDINT is defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add simplefb support, note this depends on the kernel having support for
the clocks property which has recently been added to the simplefb devicetree
binding.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as
disussed on the devicetree list]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>.
Add a generic helper to fill and enable simplefb nodes.
The first user of this will be the sunxi display code.
lcd_dt_simplefb_configure_node is also a good candidate to be converted
to use this, but that requires someone to run some tests first, as
lcd_dt_simplefb_configure_node does not honor #address-cells and #size-cells,
but simply assumes 1 and 1 for both.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
This adds a fixed mode hdmi driver for the sunxi platform. The fixed
mode is a relatively safe 1024x768, more complete EDID handling is
currently not provided. Only HDMI is supported today.
This code is enabled when HPD detects an attached monitor.
Current config is such that 8MB is shaved off at the top of the RAM.
This avoids several memory handling issues, most significant is the fact
that on linux on ARM you are not allowed to remap known RAM as IO. A
clued in display driver will be able to recycle this reserved RAM in
future though.
cfbconsole was chosen as it provides the most important functionality: a
working u-boot console, allowing for the debugging of certain issues
without the need for a UART.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Major cleanups and some small bugfixes]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This patch enhances the boot of origen board by adding support to ext2, bootz, initrd, bootenv loading and boot script.
It still keeps the previous mmc load command if boot script fails.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
SystemID information could be read through I2C1 from EEPROM
on LS1021ATWR board.
As LS1 is a little-endian processor, getting the version ID by
be32_to_cpu() is wrong. Fix it by using e.version directly.
This change will be compatible for both ARM and PowerPC.
As there is an errata that I2C1 could not work in SD boot,
reading EEPROM through I2C1 is disabled too in SD boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add define CONFIG_SYS_WRITE_SWAPPED_DATA.
For LS1021AQDS and LS1021QTWR nor flash write should swap the
bytes when handle unaligned tail bytes.
Because of the ending, if the date bus width is 16-bits and the
number of bytes is odd, we should swap the byte when write the
last one.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Define USB configs for LS1021XA such as CONFIG_SYS_FSL_USB1_ADDR,
CONFIG_USB_MAX_CONTROLLER_COUNT
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large
usb writes
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Implement sata stop command.
This introduces the __sata_stop() weak function, which mirrors
the weak __sata_initialize() function, giving users the option of
undoing the custom steps performed in overrides of sata_initialize().
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Add reset_sata() to the sata driver interface and implement it
for dwc_ahsata. This function cleans up after sata_init(), and
therefore accepts a device number like sata_init() does.
A dummy implementation is provided for the rest of the drivers.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a
preparation patch for adding an env variable to choose between secure /
non-secure boot on non-secure boot capable systems, specifically this
prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The sandbox/ext4/fat/generic fs commands do not gracefully deal with files
greater than 2GB. Negative values are returned in such cases.
To handle this, the fs functions have been modified to take an additional
parameter of type "* loff_t" which is then populated. The return value
of the fs functions are used only for error conditions.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
[trini: Update board/gdsys/p1022/controlcenterd-id.c,
drivers/fpga/zynqpl.c for changes]
Signed-off-by: Tom Rini <trini@ti.com>
Change the internal sandbox functions to use loff_t for file offsets.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Change the internal EXT4 functions to use loff_t for offsets.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
[trini: Update common/spl/spl_ext.c]
Signed-off-by: Tom Rini <trini@ti.com>
Change the internal FAT functions to use loff_t for offsets.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
[trini: Fix fs/fat/fat.c for min3 updates]
Signed-off-by: Tom Rini <trini@ti.com>
Enable md5sum to obtain the MD5 of the read and written files to check
their contents for validity.
Use map_sysmem() to map buffer in a sandbox environment.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Since commit 0defddc851 (config: Add a default CONFIG_SYS_PROMPT),
each board header does not need to define CONFIG_SYS_PROMPT
as long as it uses the default prompt "=> ".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This macro can be overridden in source files (before including common.h)
and can be used to specify a prefix for debug and error messages. An
example of how to use this is shown below:
#define pr_fmt(fmt) "foo: " fmt
#include <common.h>
...
debug("bar");
The resulting message will read:
foo: bar
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
When enumerating devices, honour the pci_skip_dev() function. This can
be used by PCI controller drivers to restrict which devices will be
probed.
This is required by the NVIDIA Tegra PCIe controller driver, which will
fail with a data abort exception if an access is attempted to a device
number larger than 0 outside of bus 0. pci_skip_dev() is therefore
implemented to prevent any such accesses.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Some filesystems have a UUID stored in its superblock. To
allow using root=UUID=... for the kernel command line we
need a way to read-out the filesystem UUID.
changes rfc -> v1:
- make the environment variable an option parameter. If not
given, the UUID is printed out. If given, it is stored in the env
variable.
- corrected typos
- return error codes
changes v1 -> v2:
- fix return code of do_fs_uuid(..)
- document do_fs_uuid(..)
- implement fs_uuid_unsuported(..) be more consistent with the
way other optional functionality works
changes v2 -> v3:
- change ext4fs_uuid(..) to make use of #if .. #else .. #endif
construct to get rid of unreachable code
Hit any key to stop autoboot: 0
=> fsuuid
fsuuid - Look up a filesystem UUID
Usage:
fsuuid <interface> <dev>:<part>
- print filesystem UUID
fsuuid <interface> <dev>:<part> <varname>
- set environment variable to filesystem UUID
=> fsuuid mmc 0:1
d9f9fc05-45ae-4a36-a616-fccce0e4f887
=> fsuuid mmc 0:2
eb3db83c-7b28-499f-95ce-9e0bb21cda81
=> fsuuid mmc 0:1 uuid1
=> fsuuid mmc 0:2 uuid2
=> printenv uuid1
uuid1=d9f9fc05-45ae-4a36-a616-fccce0e4f887
=> printenv uuid2
uuid2=eb3db83c-7b28-499f-95ce-9e0bb21cda81
=>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does. This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.
Many of references of those macros must be fixed to suppress warnings.
We have two options:
- Use min, max, min3, max3 only when the arguments have the same type
(or add casts to the arguments)
- Use min_t/max_t instead with the appropriate type for the first
argument
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
The SPI function does the same thing, so we may as well just use the new
generic function. The 'cs' parameter was not actually used, so can be
dropped.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
This code was not updated when the chip select handling was adjusted. Fix
it to call the correct function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
In some cases we need to manually bind a device to a particular driver.
Add a function to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Add dev_get_parent() as a convenience to obtain the parent of a device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
When the device is created from a device tree node, it matches a compatible
string. Allow access to that string and the associated data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
Move USB Errata checking code from "arch/powerpc" to architecture independent
file "fsl_usb.h" so that errata(s) become independent of the architecture.
For each erratum checking function for PPC arch, define a nop function for
non PPC arch for successful compilation in either case
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Enable i.MX thermal DM driver to mx6sabre_common.h file. Since the
thermal is used in init_sequence_f, so define the CONFIG_SYS_MALLOC_F_LEN
to support DM driver using in pre relocation phase.
Additional, thermal driver depends on ocotp, make sure to enable
CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is selected.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Add a new thermal uclass for thermal sensor and implement the imx
thermal driver basing on this uclass.
Signed-off-by: Ye.Li <B37916@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Since this function can use up quite a bit of space for its strings, disable
it by default in SPL. Use CONFIG_DM_WARN to re-enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Provide a CONFIG_DM_STDIO option to enable registering a serial device
with the stdio library. This is seldom useful in SPL, so disable it by
default when building for SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
For SPL we don't expect to need to remove a device. Save some code space
by dropping this feature. The board config can define
CONFIG_DM_DEVICE_REMOVE if this is in fact needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
The simple malloc() implementation is used when memory is tight. It provides
a simple buffer with an incrementing pointer.
At present the implementation is inside dlmalloc. Move it into its own file
so that it is easier to find.
Rather than using relocation as a signal that the full malloc() is
available, add a special GD_FLG_FULL_MALLOC_INIT flag. This signals that the
simple malloc() should no longer be used.
In some cases, such as SPL, even the code space used by the full malloc() is
wasteful. Add a CONFIG_SYS_MALLOC_SIMPLE option to provide only the simple
malloc. In this case the full malloc is not available at all. It saves about
1KB of code space and about 0.5KB of data on Thumb 2.
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The faster functions are not actually available in SPL and the code size
likely isn't worth it. Use the normal memcpy() in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Convert this at91sam9260-based board to use driver model. This should serve
as an example for other similar boards. Serial and GPIO are supported so
far.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary blobs
everywhere: so far we have MRC, ME and microcode.
SDRAM init works by setting up various parameters and calling the MRC. This
in turn does some sort of magic to work out how much memory there is and
the timing parameters to use. It also sets up the DRAM controllers. When
the MRC returns, we use the information it provides to map out the
available memory in U-Boot.
U-Boot normally moves itself to the top of RAM. On x86 the RAM is not
generally contiguous, and anyway some RAM may be above 4GB which doesn't
work in 32-bit mode. So we relocate to the top of the largest block of
RAM we can find below 4GB. Memory above 4GB is accessible with special
functions (see physmem).
It would be possible to build U-Boot in 64-bit mode but this wouldn't
necessarily provide any more memory, since the largest block is often below
4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large
ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit
kernels directly so this does not pose a limitation in that area. Also there
are probably parts of U-Boot that will not work correctly in 64-bit mode.
The MRC is one.
There is some work remaining in this area. Since memory init is very slow
(over 500ms) it is possible to save the parameters in SPI flash to speed it
up next time. Suspend/resume support is not fully implemented, or at least
it is not efficient.
With this patch, link boots to a prompt.
Signed-off-by: Simon Glass <sjg@chromium.org>
On x86 machines U-Boot needs to be added to a large ROM image which is
then flashed onto the target board. The ROM has a particular format so it
makes sense for U-Boot to build this image automatically. Unfortunately
it relies on binary blobs so we cannot require this for the default
build as yet.
Create a u-boot.rom output file for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
This board is a 'bare' version of the existing 'link 'board. It does not
require coreboot to run, but is intended to start directly from the reset
vector.
This initial commit has place holders for a wide range of features. These
will be added in follow-on patches and series. So far it cannot be booted
as there is no ROM image produced, but it does build without errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Many of the x86 CONFIG options will be common across different boards. Move
them to a common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For board IDs a common approach is to set aside several GPIOs for use in
determining the board ID. This can provide information about board features
and the revision.
Add a function that turns a list of GPIOs into an integer by assigning
each GPIO to a single bit.
Signed-off-by: Simon Glass <sjg@chromium.org>
In general we can't store things in the data section until we have inited
SDRAM. Some platforms allow this (e.g. those with SPL) but some don't. Move
the pointer to global_data so that it will work on all platforms.
Without this fix the serial port will not work prior to relocation with
driver model on some platforms.
Signed-off-by: Simon Glass <sjg@chromium.org>
Permit decoding of a named memory region from the device tree. This allows
easy run-time configuration of the address of on-chip SRAM, SDRAM, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Add an additional function for adding information to the device tree before
booting. This permits additions which are not board-specific.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
The message about needing to reset should be printed no matter what error
is printed. Also, an error should always be printed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Flash regions can optionally be compressed or hashed. Add the ability to
read this information from the flashmap.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Use the correct FDT data types for this function. Also add more debugging.
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
This function is useful for ensuring that a node exists. Export it so it
can be used more widely.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
This function can fail if the device tree runs out of space. Rather than
silently booting with an incomplete device tree, allow the failure to be
detected.
Unfortunately this involves changing a lot of places in the code. I have
not changed behvaiour to return an error where one is not currently
returned, to avoid unexpected breakage.
Eventually it would be nice to allow boards to register functions to be
called to update the device tree. This would avoid all the many functions
to do this. However it's not clear yet if this should be done using driver
model or with a linker list. This work is left for later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
This commit replaces roundup macro with the one from Linux Kernel.
DEFINE_ALIGN_BUFFER must be fixed because typechecking can not
be used in this context.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
These macros seem to be useful for U-Boot too (or at least
harmless). Imported from Linux 3.18-rc2.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.
In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.
Moreover, we are suffering from too cluttered include/common.h.
This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.
Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
All the references of DIV_ROUND have been replaced with
DIV_ROUND_CLOSEST. Remove DIV_ROUND.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM1136 and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM1136.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM926EJS and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM920T and replaces the
only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Some (not all) of ARMv7 boards define CONFIG_ARMV7, which is useless.
Besides, it is never referenced.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
