Commit graph

63644 commits

Author SHA1 Message Date
Samuel Mendoza-Jonas
e2ffeaa162 phy: Include NC-SI in phy setup
Add NC-SI to the usual phy handling. This makes two notable changes:
- Somewhat similar to a fixed phy, phy_connect() will create an NC-SI
phy if CONFIG_PHY_NCSI is defined.
- An early return is added to phy_read() and phy_write() to handle a
case like the NC-SI phy which does not define a bus.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:23 -05:00
Samuel Mendoza-Jonas
f641a8ac93 phy: Add support for the NC-SI protocol
This introduces support for the NC-SI protocol, modelled as a phy driver
for other ethernet drivers to consume.

NC-SI (Network Controller Sideband Interface) is a protocol to manage a
sideband connection to a proper network interface, for example a BMC
(Baseboard Management Controller) sharing the NIC of the host system.
Probing and configuration occurs by communicating with the "remote" NIC
via NC-SI control frames (Ethernet header 0x88f8).

This implementation is roughly based on the upstream Linux
implementation[0], with a reduced feature set and an emphasis on getting
a link up as fast as possible rather than probing the full possible
topology of the bus.
The current phy model relies on the network being "up", sending NC-SI
command frames via net_send_packet() and receiving them from the
net_loop() loop (added in a following patch).

The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent
field definitions.

[0]: https://github.com/torvalds/linux/tree/master/net/ncsi
[1]: https://github.com/torvalds/linux/blob/master/net/ncsi/ncsi-pkt.h

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:23 -05:00
Tom Rini
2d4cd12dc2 Azure/Travis: Re-sync jobs and clarify exclusions
We keep both of these jobs in sync as much as possible even when the
primary motivation is to keep Travis from exceeding the build time limit
there.  With that in mind:
- Use "rk" not "rockchip" to get all Rockchip SoC platforms in one job,
  rather than just all Rockchip vendor platforms.
- The NXP LX216* SoCs have their own job, exclude them from the AArch64
  generic job.
- SoCFPGA SoCs have their own job, exclude them from the AArch64 generic
  job.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-03-09 13:01:57 -04:00
Oliver Graute
d1d78db1db imx: imx8qm_rom7720: added missing USDHC Base address defines
Added missing USDHC Base address defines

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:06:58 +01:00
Max Krummenacher
d40aa43f3f ARM: dts: imx8mm-verdin: drop rgmii_rxc_dly/txc_dly
The FEC in the i.MX8MM doesn't support this feature. So don't pretend one
can use it.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09 15:06:47 +01:00
Igor Opaniuk
0c45a51970 ARM: dts: imx8mm-verdin: dm-spl for pinctrl_usdhc1 node
Let pinctrl configuration for eMMC node (usdhc1) also be
accessible in SPL.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09 15:06:40 +01:00
Giulio Benetti
289dd9f072 serial_lpuart: make clock failure less verbose
Some device may enable CONFIG_CLK but not still support this clock in
CC, so better use debug() in place of dev_warn() otherwise a lot of
boards will throw useless dev_warn()s.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-09 15:06:23 +01:00
Frieder Schrempf
291e3ab904 imx8mm/mn: Add missing root clock entry for ARM core clock
The current implementation in arch/arm/mach-imx/cpu.c uses non-DM
code to retrieve the core clock frequency. As the root clock is not
listed we currently get:

CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz

Fix this by adding the missing entry, which results in:

CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:06:15 +01:00
Baruch Siach
064e49ff5e mx6cuboxi: don't disable fdt relocation
fdt_high value of 0xffffffff disables fdt relocation on boot. We don't
need that for Cubox-i/Hummingboard. Rely on generic code to find the
optimal fdt location at boot time.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-03-09 15:06:09 +01:00
Oliver Graute
789ddde113 imx: Makefile: added missing ahab.o
added missing ahab.o in Makefile

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:05:38 +01:00
Fabio Estevam
827f0a3f22 mx6sxsabresd: Enable DM_PCI
Enale DM_PCI support in order to avoid board removal from
the project.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:05:24 +01:00
Giulio Benetti
229f078512 configs: imxrt1050-evk: enable D/I cache
Soc supports cache so let's enable it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-03-09 15:05:12 +01:00
Anatolij Gustschin
823c4cd749 imx: mx6ul_14x14_evk: configure for 24bpp display
Before DM_VIDEO conversion this board used 24bpp
display configuration, so use it again.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:05:03 +01:00
Fabio Estevam
a29d79da43 ARM: dts: imx6sx-sdb: Sync with kernel 5.4.16
Sync the imx6sx-sdb dts files with kernel 5.4.16.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:04:51 +01:00
Fabio Estevam
47c2eae1b8 ARM: dts: imx6sx: Sync with kernel 5.4.16
Sync the imx6sx dts files with kernel 5.4.16.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:04:42 +01:00
Fabio Estevam
322bc3e412 imx8qxp_mek: Add myself as maintainer
I would like to help co-maintaining this board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:04:29 +01:00
Fabio Estevam
028b195b39 mx7dsabresd: Add myself as maintainer
I would like to help co-maintaining this board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:04:16 +01:00
Fabio Estevam
10a8cc01b3 imx8qxp_mek: Fix the console command line string
Currently the expansion of the console variable leads to
the following kernel command line:

console=ttyLP0,${baudrate} earlycon root=/dev/mmcblk1p2 rootwait rw

, which causes the console to not show characters after the LPUART driver
is probed as the 'baudrate' variable is not properly translated.

Fix it by splitting the console variable in two parts: one for the
ttyLP0 part and the other one for the baudrate, which matches the way
it is done on other i.MX targets.

Tested by successfully booting a mainline kernel on a i.MX8QXP MEK
board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:03:31 +01:00
Stefano Babic
c82b70bcc3 imx: remove woodburn board
Board is not longer used, remove it.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-03-09 15:03:24 +01:00
Heiko Schocher
158d93adb4 imx6, aristainetos2c: add da9063 pmic setup
On the aristainetos2c boards the PMIC needs to be initialized,
because the Ethernet PHY uses a different regulator that is not
setup per hardware default. This does not influence the other
versions as this regulator isn't used there at all.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-03-09 15:03:04 +01:00
Faiz Abbas
59af57f3cf configs: j721e_evm: Add Support for eMMC boot
Enable configs to support eMMC boot.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
91332bd210 configs: am65x_evm: Add CONFIG_SUPPORT_EMMC_BOOT
With CONFIG_SUPPORT_EMMC_BOOT moved to Kconfig, move it to defconfig
files.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
0abf600746 arm: dts: k3-j721e-r5-common-proc-board: Use unique names for dummy clocks
Update the dummy clock names to use unique identifiers. Otherwise the
previous node just gets overwitten by the next one with the same name.
This fixes eMMC boot not working on J721e-evm.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
d45ffb7937 arm: K3: sysfw-loader: Add a config_pm_pre_callback()
System firmware does not guarantee that clocks going out of the device
will be stable during power management configuration. There are some
DCRC errors when SPL tries to get the next stage during eMMC boot after
sysfw pm configuration.

Therefore add a config_pm_pre_callback() to switch off the eMMC clock
before power management and restart it after it is done.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
cf00825596 spl: mmc: Fix spl_mmc_get_uboot_raw_sector() implementation
The call to spl_mmc_get_uboot_raw_sector() completely ignores and
overwrites the raw_sect value passed from the caller of spl_mmc_load().

Fix this by passing raw_sect to the function and returning the same
value in the default case.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
a851213920 mmc: am654_sdhci: Implement workaround for card detect
The 4 bit MMC controllers have an internal debounce for the SDCD line
with a debounce delay of 1 second. Therefore, after clocks to the IP are
enabled, software has to wait for this time before it can power on the
controller.

Add a deferred_probe() callback which polls on sdcd for a maximum of 2 seconds
before switching on power to the controller or (in the case of no card)
returning a ENOMEDIUM. This pushes the 1 second wait time to when the
card is actually needed rather than at every probe() making sure that
users who don't insert an SD card in the slot don't have to wait such a
long time.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
c7d106b4eb mmc: am654_sdhci: Update output tap delay writes
With the latest RIOT, there is a different otap delay value for each
speed mode. Add a new binding with every supported speed mode. Also
disable a given speed mode in the host caps if its corresponding
otap-del-sel is not present.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
e8d5dde447 mmc: Merge SD_LEGACY and MMC_LEGACY bus modes
MMC_LEGACY & SD_LEGACY are not differentiated timings in the spec and
don't have any meaningful differences. Therefore, get rid of all
references to SD_LEGACY and use MMC_LEGACY to mean both of them.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
cb884347f4 sdhci: Add sdhci_deferred_probe() API
Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
32860bdbc1 mmc: Add a deferred_probe() API
Add a deferred_probe() API for platforms that want to do some
configurations just before starting to enumerate the device.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09 08:33:15 +08:00
Faiz Abbas
0d3c858488 mmc: Add a saved_clock member
Add a saved_clock member to struct mmc to store the previous clock speed
in the clock needs to be stopped for some time.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:15 +08:00
Masahiro Yamada
bd602c5367 mmc: make <mmc.h> self-contained
This header uses bd_t without including its definition.

Change it to (struct bd_info), and add the forward declaration
to specify it as a structure.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-03-09 08:33:15 +08:00
Alex Nemirovsky
ad8336fd4c board: presidio-asic: Add eMMC board support
Add initial eMMC support for Cortina Access Presidio
Engineering Board

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-03-09 08:33:15 +08:00
Arthur Li
d55e4e74ce mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCs
Initial DesignWare based DM support for Cortina Access CAxxxx SoCs.

Signed-off-by: Arthur Li <arthur.li@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-03-09 08:33:13 +08:00
Samuel Mescoff
4b7f5f3e75 Makefile: fix processing of default environment file
Allow the default environment file to contain long lines split into
multiples lines.

Leading white spaces can be added for readability as well.

Signed-off-by: Samuel Mescoff <samuel@mescoff.fr>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-06 14:15:20 -06:00
Andrew F. Davis
2fcaa84d01 board: ti: README: Update OP-TEE binary name
The OP-TEE binary to use is renamed to v2 as the v1 binary has been
deprecated and is no longer built by default.

Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-03-06 12:53:08 +05:30
Keerthy
6d310ba50c arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node
Add ospi1 flash node required for QSPI boot.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Keerthy
769c94263f arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi
Add assigned-clocks/rates properties for ospi1/qspi.
This is the expected rate as per ROM configuration.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Keerthy
896cf0e20a arm: dts: k3-j721e: Enable ospi1/qspi
Enable the ospi1/qspi for both r5 and a72 configurations.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Tom Rini
9f976bac2b Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Revert "x86: use invd instead of wbinvd in real mode start code"
- Convert toradex boards README to reST
- serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()
- x86: apl: Use cpu_x86_get_count() for cpu_ops.get_count
2020-03-05 07:51:12 -05:00
Wolfgang Wallner
2c64d11e32 x86: apl: Use cpu_x86_get_count() for cpu_ops.get_count
Use cpu_x86_get_count() to read the number of cores.

cpu_x86_get_count() reads the number of CPUs from the device tree.
Using this function we can support multiple Apollo Lake
variants, e.g.: E3940 (4 cores) and E3930 (2 cores).

This was tested on the E3940 and E3930 Apollo Lake variants.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:22 +08:00
Wolfgang Wallner
fc35d7e1b1 x86: cpu_x86: Make cpu_x86_get_count() non-static
The function cpu_x86_get_count() is also useful for other modules.
Make it non-static and add a prototype + description.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:22 +08:00
Wolfgang Wallner
6301615e54 doc: Chromebook Coral: Fix typo for "Top of CAR region"
The value for "Top of CAR region" should be fefc0000, not
fefc000. This matches the Kconfig default values, as
SYS_CAR_ADDR and SYS_CAR_SIZE are 0xfef00000 and 0xc0000
respectively.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:21 +08:00
Wolfgang Wallner
5a9d7f9c91 x86: p2sb: Drop 'apl' prefix
Drop the Apollo Lake prefix 'apl' from the functions, types and
variables in the P2SB driver.

The P2SB is not Apollo Lake specific, and as such it was moved in
commit 2999846c11 ("x86: Move P2SB from Apollo Lake to a more generic
location") from the Apollo Lake folder to the intel_common folder.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:21 +08:00
Wolfgang Wallner
720f9e1fdb serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()
Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
which potentially accesses the parent PCI bus. If this happens before
the parent PCI bus is probed the resulting address will be wrong.

This behavior was triggered by commit 82de42fa14 ("dm: core:
Allocate parent data separate from probing parent").

According to a comment in drivers/pci/pci-uclass.c [1] accessing
the PCI parent bus in ofdata_to_platdata() is not allowed, and the
access should be moved to the probe() function.

Move the call to dev_read_addr_pci() and the related handling of the
'addr' value from the ofdata_to_platdata() to its own function,
which is then called from the probe() method.

While moving the code, the comment /* try Processor Local Bus device
first */ was dropped. It was initially added with commit 3db886a5bf
("serial: ns16550: Support ns16550 compatible pci uart devices") and
later made obsolete with commit 33c215af4b ("dm: pci: Add a function
to read a PCI BAR").

[1] Comment in drivers/pci/pci-uclass.c:
"A common cause of this problem is that this function is called in the
ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
method is not allowed, since it has not yet been probed. To fix this,
move that access to the probe() method of @dev instead."

Fixes: 82de42fa14 ("dm: core: Allocate parent data separate from probing parent")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # Tested on Intel Galileo
2020-03-05 18:25:10 +08:00
Andy Shevchenko
fa97ca161b Revert "x86: use invd instead of wbinvd in real mode start code"
This reverts commit 0d67fac29f.

As real hardware testing (*) shows the above mentioned commit
breaks U-Boot on it. Revert for the upcoming release. We may get
more information in the future and optimize the code accordingly.

(*) on Intel Edison board.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:19:40 +08:00
Heinrich Schuchardt
38a2a48cd9 x86: remove dead code in intel_clk_get_rate()
If all branches of a switch statement have a return instruction, all
subsequent lines are unreachable.

Identified with cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-05 18:19:40 +08:00
Igor Opaniuk
e98ea49a0e toradex: MAINTAINERS: entries for new reST docs
Add entries for the newly created documentation files in reST
format.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:19:40 +08:00
Igor Opaniuk
ad6a3f3c31 doc: board: colibri-imx8x: convert readme to reST
Convert README to reStructuredText format.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:19:40 +08:00
Igor Opaniuk
6f04caf71a doc: board: apalis-imx8: convert readme to reST
Convert README to reStructuredText format.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:19:40 +08:00