Commit graph

15614 commits

Author SHA1 Message Date
Simon Glass
07f2f58b94 x86: fsp: Create a common fsp_support.h header
Many support functions are common between FSP1 and FSP2. Add a new header
to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove forward declarations in fsp_support.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:53:41 +08:00
Simon Glass
ff7abb85a4 x86: sysreset: Allow reset driver to be included in SPL/TPL
At present this driver is always included in SPL and TPL, if U-Boot proper
enables it. Update the Makefile to provide full control using the existing
Kconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: make the Kconfig help text a little bit clearer]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:51:04 +08:00
Simon Glass
2e2c514a40 serial: ns16550: Allow serial to enabled/disabled in SPL
At present this driver uses the wrong condition for including the code and
drivers in SPL/TPL. Update it so that the code is only included if
DM_SERIAL is enabled for SPL/TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:51:01 +08:00
Simon Glass
8331188615 x86: Rename existing FSP code to fsp1
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.

Add a Kconfig which defines which version is in use.

Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:50:08 +08:00
Eugeniy Paltsev
2a7232371a NET: DW: fix regression for ARC boards
The commit
642b80d256 ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.

Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-10-07 13:23:49 -04:00
Simon Glass
e18c41fca4 dm: core: Correct bad cast in ofnode_get_addr_size_index()
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.

Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-03 21:10:53 +08:00
Simon Glass
e587886a61 dm: core: Correct low cell in ofnode_read_pci_addr()
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.

Fixes: 9e51204527 (dm: core: Add operations on device tree references)
Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT)
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-03 21:10:11 +08:00
Tom Rini
780a17e814 - fix sunxi LCD clock divider
- fix splash logo with DM_VIDEO and CONFIG_VIDEO_LOGO
 - fix splash banner output with DM_VIDEO
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Merge tag 'fixes-for-2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-video.git

- fix sunxi LCD clock divider
- fix splash logo with DM_VIDEO and CONFIG_VIDEO_LOGO
- fix splash banner output with DM_VIDEO
2019-09-22 16:39:01 -04:00
Mark Kettenis
f34e7fc29b sunxi: video: HDMI: Fix LCD clock divider
Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider.  This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.

Fixes: 1feed358ed ("sunxi: video: HDMI: Fix clock setup")

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2019-09-21 10:52:57 +02:00
Tom Rini
d6c7309f56 Merge tag 'u-boot-rockchip-20190920' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3288 tinker and evb SPL boot fail
- Enable get sn from cpuid for rk3399 rockpro64 board
2019-09-20 17:43:33 -04:00
Suniel Mahesh
1e3966394a watchdog: omap_wdt: Fix WDT target reset when booted from emmc
AM335X based beaglebone black target gets reset by DM converted watchdog
if booted from emmc around 60sec. Fixed this by moving driver's private struct
variable initialization at different places in the driver to driver's probe.
Tested on Beaglebone Black.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM")
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2019-09-19 12:54:29 -04:00
Biwen Li
d64e01f367 rtc: ds3231/ds3232: fix coding style
The patch fixes coding style

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2019-09-19 12:18:53 -04:00
Jagan Teki
4f24163efa ram: rk3288: Initialize dram for TPL builds
Few of the rk3288 boards like tinker, vyasa are using
TPL, SPL bootchain so the dram initialization must needed
during TPL stage. So add proper ifconstruct to satisfy
both TPL, SPL and SPL-only bootchain boards.

This eventually fixing TPL to SPL handoff, otherwise missing
dram initilaztion at TPL stage would leads to SPL hang.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Tom Rini
a9fa70b7b7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
2019-09-16 13:13:45 -04:00
Tom Rini
0d6160a340 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- fix mvebu_a3700_spi clock prescale (Marek Behún)
- unmark MXS_SPI, DEPRECATED (Lukasz)
- add spi_write_then_read (Jagan)
- fix SST26* flash ICs (Eugeniy)
- fix soft_spi data abort (Christophe)
2019-09-16 13:13:12 -04:00
Eugeniy Paltsev
718fd834c0 mtd: spi-nor: enable protection ops for SST26 flash series
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.

Enable protection ops for SST26 flash series which were
previously enabled by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Eugeniy Paltsev
e0cacdcc0a mtd: spi-nor: add missing SST26* flash IC protection ops
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.

Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Jagan Teki
210d8ad0fa mtd: spi: Drop sf.c
spi_write_then_read, will manage to do the respective
spi_xfer based on the tx_buf, rx_buf so drop the
legacy spi_flash_read/write/cm code.

Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Jagan Teki
43084a56b0 mtd: spi_dataflash: Use spi read then write
Now, we have spi_write_then_read routine that would handle
spi_xfer handling based on the tx_buf and rx_buf parameters.

So, replace individual flash read/write/cmd transfer call
with spi_write_then_read.

Cc: Egnite GmbH <info@egnite.de>
Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
Cc: Ilko Iliev <iliev@ronetix.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Alison Wang <alison.wang@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Jagan Teki
8473b32127 spi: Add spi_write_then_read
Add support for SPI synchronous write followed by read,
this is common interface call from spi-nor to spi drivers.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2019-09-16 08:09:22 +05:30
Lukasz Majewski
6bd6c21693 spi: Kconfig: Unmark DEPRECATED for MXS_SPI
MXS_SPI driver now partially converted into driver-model,
so unmark the DEPRECATED option for the same.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Christophe Kerello
dfe72d081d spi: soft_spi: Fix data abort if slave is not probed
In case spi_get_bus_and_cs callback is used, spi bus is first probed
then slave devices are probed. To avoid a data abort in soft_spi probe
function, we need to check that (slave != NULL).

If slave is NULL, cs_flags and clk_flags will be initialized with
respectively GPIOD_ACTIVE_LOW and 0.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Marek Behún
07a5cb9d3b spi: mvebu_a3700_spi: Fix clock prescale computation
The prescaler value computation can yield wrong result if given 0x1f at
the beginning: the value is computed to be 0x20, but the maximum value
the register can hold 0x1f, so the actual stored value in this case is
0, which is obviously wrong.
Set the upper bound of the value to 0x1f with the min macro.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Tom Rini
6f4001315a Merge branch 'master' of git://git.denx.de/u-boot-usb
- Assorted bugfixes
2019-09-14 19:56:09 -04:00
Vignesh Raghavendra
62a9620135 soc: ti: k3-navss-ringacc: fix k3_nav_ringacc_ring_reset_dma
In case dma_ring_reset_quirk is not set the k3_ringacc_ring_reset_dma will
just exit without ring reset. Fix it, by adding ring reset call in case
dma_ring_reset_quirk is not.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-09-13 11:56:08 -04:00
Thomas Schaefer
412e25ab5f watchdog: sp805_wdt: add expire_now method
Add sp805_wdt_expire_now function.
expire_now method is required by U_BOOT_DRIVER.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Yinbo Zhu
6f883e501b mmc: fsl_esdhc: Add emmc hs200 support
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a.
This increases eMMC performance.
Tuning procedure is currently not supported.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:05:38 +05:30
Yinbo Zhu
29009a507c mmc: Kconfig: Add FSL_ESDHC_USE_PERIPHERAL_CLK option
NXP fsl_esdhc controller supports two reference clocks:
platform clock and peripheral clock
Peripheral clock can provide higher clock frequency
which is required to be used for tuning of SD UHS mode
and eMMC HS200/HS400 modes.

Peripheral clock is enabled by default by defining config
option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes
are supported.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:02:10 +05:30
Kever Yang
445f85fc8e rockchip: clk: rk3399: remove clk_enable()
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
7be113ba79 rockchip: clk: rk3368: remove clk_enable()
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
899c3b3523 rockchip: clk: rk3328: remove clk_enable()
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
c7ed19047e rockchip: clk: rk3288: remove clk_enable()
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
6578db8961 usb: ohci-generic: don't probe fail if there is no clk_enable() ops
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11 16:16:12 +08:00
Kever Yang
54a0c7b2e7 usb: ehci-generic: don't probe fail if there is no clk_enable() ops
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11 16:16:12 +08:00
Jean-Jacques Hiblot
e3e5825d01 usb: musb_hcd: fix compilation error
commit 65c1f9820c8f79f "usb: Add nonblock argument to submit_int_msg"
breaks the musb_hcd driver.
Fixing it by adding the missing argument

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-09-11 10:11:39 +02:00
Michal Suchanek
9dcab2c4d2 dwc2: use the nonblock argument in submit_int_msg
An USB 1.1 keyboard connected to dwc2 through a high-speed hub does not
report status until it changes. With this patch you can enable keyboard
by pressing a key while USB devices are probed. Without a keypress no
state is reported and the probe times out. We don't want to wait for a
keypress or timeout while polling for keypresses so implement an int_msg
nonblock variant that exits early on error.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2019-09-11 10:11:29 +02:00
Michal Suchanek
3437121c03 usb: Add nonblock argument to submit_int_msg
This will be used to implement non-blocking keyboard polling in case of
errors.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2019-09-11 10:11:29 +02:00
Neil Armstrong
b35b807682 usb: xhci-dwc3: Add support for dis_u2_susphy_quirk
This quirk is necessary for the Amlogic GXL SoCs otherwise the
Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:

XHCI timeout on event type 33... cannot recover.
BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
BUG!

This quirk is also handled in the dwc3 core code, but until the
xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here
to fix USB support on the Amlogic libretech-cc and libretech-ac board
when a device is only plugged in the OTG port.

Cc: Yuri Frolov <crashing.kernel@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 10:00:53 +02:00
Tom Rini
40e362a9ab Merge tag 'mmc-9-6-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Bug fixes to mmc_spi
Add Aspeed SD driver
Fix dw_mmc timeout calculation
Fix timeout values passed to mmc_wait_dat0
sdhci dt caps/mask update

[trini: Fix evb-ast2500_defconfig CONFIG_MMC line]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-09-08 21:15:13 -04:00
Tom Rini
2f760735c1 Merge branch 'master' of git://git.denx.de/u-boot-sh
- Initial DM conversion
2019-09-07 13:49:39 -04:00
Tom Rini
ba83753289 - fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
 - increase kernel image size from 8 MB to 64 MB on arm64
 - add support for RPi4
 - add prefixes for raspberry pi related stuff to git-mailrc
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Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot

- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
2019-09-06 19:49:51 -04:00
Matthias Brugger
e0e3c7dada mmc: bcm283x: Add support for bcm2711 device in bcm2835_sdhci
The bcm2711 has two emmc controllers. The difference is the clocks
they use. Add support for the second emmc controller.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
2019-09-06 18:16:59 +02:00
Raul Benet
b1125802a5 mmc: bcm2835-host: Fix wait_transfer_complete
Function bcm_2835_wait_transfer_complete() is not waiting long enough.
The previous code was claiming to wait for ~1 seconds, but as it depends
on register reads it's time actually varies.
Some cards require wait times of up to ~56 ms to perform
the command 'saveenv' on an EXT4 partition.

Re-implement the loop exit condition to use get_timer() which allows
to specify the wait time in more reliable manner. Set the maximum wait
time to the originally intended 1 second.

Signed-off by: Raul Benet <raul.benet_at_kaptivo.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
T Karthik Reddy
cd45d6f395 mmc: sdhci: Add support for dt caps & caps mask
The sdhci capabilities registers can be incorrect. The
sdhci-caps-mask and sdhci-caps dt properties specify which bits of
the registers are incorrect and what their values should be. This
patch makes the sdhci driver use those properties to correct the caps.
Also use "dev_read_u64_default" instead of "dev_read_u32_array" for
caps mask.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-09-06 10:40:13 +08:00
T Karthik Reddy
3f3d77158b dm: core: Add functions to read 64-bit dt properties
This patch adds functions dev_read_u64_default & dev_read_u64
to read unsigned 64-bit values from devicetree.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-06 10:39:15 +08:00
Bin Meng
d3302395e7 dm: mmc_spi: Fix NULL pointer dereference in mmc_spi_bind()
The mmc_spi driver's priv is not available in its bind phase(). Use
platdata instead.

Fixes: 05e35d4297 ("mmc: mmc_spi: Re-write driver using DM framework")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-09-05 15:29:29 +08:00
Kever Yang
c077c057a4 mmc: dw_mmc: fix timeout calculate method
There are two cases not been considered:
- use uint for timeout, it will overflow when size bigger than 512KB for
  it *8*1000 at the beginning, but we may use size up to 32MB; The
  'timeout' will overflow if size bigger than 51.2MB after this fix, which
  should be enough for U-Boot;
- The timeout is using clock speed for data rate, but the device may not
  have such high speed, eg. clock is 52MHz while the device write speed may
  be less than 10MB/s, and we may use up to 150MHz clock.

Fix them in this patch, the max timeout is about 6500 when size is 32MB
after fix.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-05 15:28:40 +08:00
Eddie James
7764ee2e83 mmc: Add Aspeed SD controller driver
Add support for the Aspeed SD host controller engine.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-05 15:27:31 +08:00
Eddie James
38c9f08b41 clk: aspeed: Add support for SD clock
Add code to enable the SD clock on the ast2500 SoC.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05 15:27:31 +08:00
Sam Protsenko
6cf8a903c5 mmc: Rename timeout parameters for clarification
It's quite hard to figure out time units for various function that have
timeout parameters. This leads to possible errors when one forgets to
convert ms to us, for example. Let's rename those parameters
correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues
further.

While at it, add time units info as comments to struct mmc fields.

This commit doesn't change the behavior, only renames parameters names.
Buildman should report no changes at all.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05 15:27:31 +08:00