Commit graph

44 commits

Author SHA1 Message Date
Roger Quadros
02590aa31c ahci: Don't start command DMA engine before buffers are set
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)

This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358()
44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access

Signed-off-by: Roger Quadros <rogerq@ti.com>
2014-10-10 09:44:41 -04:00
Ian Campbell
a6e50a88d8 ahci: provide sunxi SATA driver using AHCI platform framework
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.

The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocumented.

The Allwinner AHCI controller also requires some magic (and, again,
undocumented) DMA initialisation when starting a port.  This is added under a
suitable ifdef.

This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on
contents of Linux DTS files, including SATA power pin config taken from the
DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-07-31 15:37:22 +02:00
Ian Campbell
e0ddcf93b9 AHCI: Increase link timeout to 200ms
In 73545f75b6 "ahci: wait longer for link" I increased the
timeout to 40ms based on the observed behaviour of a WD disk on a
Cubietruck. Since then Karsten Merker and myself have both
observed timeouts with HGST disks (Karsten on Cubietruck, me on
Cubieboard2). Increasing the timeout to ~175ms fixes this, so go
to 200ms for a bit of headroom.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Karsten Merker <merker@debian.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-07-22 07:44:28 -04:00
Roger Quadros
3f62971162 ahci: Fix data abort on multiple scsi resets.
Commit 2faf5fb82e introduced a regression that causes a data
abort when running scsi init followed by scsi reset.

There are 2 problems with the original commit
1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is
assigned to ataid[port] and used by other functions.
2) The function ata_scsiop_inquiry() tries to free memory which was
never allocated on the heap.

Fix these problems by using tmpid as a temporary cache aligned buffer.
Allocate memory separately for ataid[port] and re-use it if required.

Fixes: 2faf5fb82e (ahci: Fix cache align error messages)

Reported-by: Eli Nidam <elini@marvell.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2014-04-02 15:44:40 -04:00
Ian Campbell
73545f75b6 ahci: wait longer for link.
I have observed timeouts on a cubietruck.

The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is any harm in waiting a bit
longer.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
2014-03-10 13:50:31 -04:00
Ian Campbell
c6f3d50b9b ahci-plat: Provide a weak scsi_init hook
This allow the platform to register the platform ahci device.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
2014-03-10 13:50:31 -04:00
Roger Quadros
2faf5fb82e ahci: Fix cache align error messages
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.

 scanning bus for devices...
 ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818

CC: Aneesh V <aneesh@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2013-12-04 08:12:08 -05:00
Roger Quadros
d73763a4fb ahci: Error out with message on malloc() failure
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.

CC: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2013-12-04 08:12:08 -05:00
Wolfgang Denk
3765b3e7bd Coding Style cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-14 16:06:53 -04:00
Rob Herring
344ca0b40c ahci: convert to use libata functions and definitions
libata already has similar functions as implemented in the ahci code.
Refactor the code to use the libata variants and remove the dependency on
ata.h. Convert some defines to use the version from libata.h. Also, remove
some unnecessary memset's of bss data.

This is a step toward hopefully merging ahci.c and dw_ahsata.c which are
essentially the same driver.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00
Rob Herring
7610b41ddf ahci: increase spin-up timeout to 20 sec
Based on Linux libata code, most drives are less than 10 sec, but some
need up to 20 sec.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00
Rob Herring
178210847f ahci: handle COMINIT received during spin-up
Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
the link to go down and we need to re-initialize the link.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-09-06 13:09:07 -04:00
Rob Herring
124e9fa132 ahci: move link bring-up handling to separate function
Move the link bring-up handling to a separate weak function in order to
allow platforms to override it. This is needed on highbank platform which
needs special phy handling.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-09-06 13:09:07 -04:00
Rob Herring
2bdb10dbf5 ahci: add defines for PORT_SCR_STAT register bits
Replace hard-coded register values with proper defines for PORT_SCR_STAT
register.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-09-06 13:09:07 -04:00
Rob Herring
796c2ebd6f ahci: fix memory leak in ata_scsiop_inquiry
This fixes a memory leak when scsi inquiry fails.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00
Rob Herring
48c3a87c0a ahci: fix unaligned access
gcc 4.7 will generate unaligned accesses to local char arrays, so make
them static to avoid that.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00
Richard Gibbs
2915a0223a ahci: use ports implemented map instead of num_ports
The AHCI driver was incorrectly using the Capabilities register NP (number
of ports) field to determine which ports to activate. This commit changes
it to correctly use the PORTS_IMPL register as a port map.

Signed-off-by: Richard Gibbs <richard.gibbs@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
York Sun
472d546054 Consolidate bool type
'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.

All other #define, typedef and enum are removed. They are all consistent with
true = 1, false = 0.

Replace FALSE, False with false. Replace TRUE, True with true.
Skip *.py, *.php, lib/* files.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-04-01 16:33:52 -04:00
Walter Murphy
fe1f808ce7 ahci: Expand HDD Logical Block addressability up to 32 bits
Currently, this driver uses a 28bit interface to AHCI, this
limits the number of blocks addressable to 2^28, or the max
disk size to 512(2^28) or about 137GB. This change allows
supporting drives up to about 2TB.

Testing this is a bit difficult. There is test code that
can be inserted into U-Boot that will write test patterns
into certain unused blocks. These patterns can be manually
checked using 'dd' after boot. Another way is to confirm the
original error that exposed this bug is fixed. IOW: see if
AU (Auto Update) will now work on the drive. Also, check
that there are no warning messages from the 'cgpt' utility.

Signed-off-by: Walter Murphy <wmurphy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Marc Jones
766b16fe18 ahci: Perform SATA flush after disk write.
Writes in u-boot are so rare, and the logic to know when is
the last write and do a flush only there is sufficiently
difficult. Just do a flush after every write. This incurs,
usually, one extra flush when the rare writes do happen.

Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Marc Jones
2a0c61d401 ahci: Support spin-up and link-up separately
Add HDD handling to the SSD-only AHCI driver, by separately dealing with
spin-up and link-up.

Signed-off-by: Marc Jones <marc.jones@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:43 -07:00
Walter Murphy
57847660bb ahci: Adjust SATA timeouts for hard disk (spinup delay & command timeout)
Note: These are timeout values and not delay values, so the event being
timed out will complete whenever it is actually ready, with a
measurement granularity of 1 millisecond, up till the timeout value.
Therefore, there is no effect on SSD booting.

The values were determined by instrumenting the code and measuring the
actual time taken by several different models of HDD for each of the
parameters and then adding 50% more for the spinup value and just
doubling the command timeout value.

Signed-off-by: Walter Murphy <wmurphy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
90b276f6a2 ahci: flush / invalidate dcache around SATA commands
Exynos5 automatically performs DMA when the SATA controller executes
commands.  This adds the necessary dcache-to-memory flush &
invalidation calls to allow the DMA to properly function.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
64738e8ae8 ahci: Use virt_to_phys() to denote physical addresses for DMA
Update the assignment of various physical memory buffers used by the
SATA controller to explicitly be denoted as physical addresses.

The memory is identity-mapped, so these function calls are a nop, but
they provide good semantic documentation for any maintainers.

The return value of virt_to_phys() is 'unsigned long'.  On machines
where sizeof(unsigned long) != sizeof(pointer), a cast through
(uintptr_t) is needed to appease the compiler due to the potential of
losing the upper 32 bits of the address.

In compilation this scenario, a physical address could be 64-bits, yet
the C pointer environment only allows 32-bit addresses; the constraint
is that pointers cannot address more than 4Gb of memory and if
virt_to_phys() ever returns an out-of-range value for the physical
address, there are issues with emmory mapping which must be solved.
However, since the memory is identify mappeed, there is no problem
introducing the cast: the original pointer will reside in 32-bits, so
the physical address will also be within in 32-bits.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
5a2b77f47d ahci: Fix 'Invaild' typo
This fixes a spelling error in a message which can be output to the
console.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Taylor Hutt
c873111565 ahci: Use sizeof(fis) instead of hardcoding '20'
This cleanup replaces the hardcoded use of '20', which represents the
number of bytes in the FIS, with sizeof(fis).

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:42 -07:00
Gabe Black
19d1d41e84 ahci: Make the AHCI code find the capacity of disks > 128 GB properly
In the structure returned by the ATA identify device command, there are two
fields which describe the device capacity. One is a 32 bit data type which
reports the number of sectors as a 28 bit LBA, and the other is a 64 bit data
type which is for a 48 bit LBA. If the device doesn't support 48 bit LBAs,
the small value is the only value with the correct size. If it supports more,
if the number of sectors is small enough to fit into 28 bits, both fields
reflect the correct value. If it's too large, the smaller field has 28 bits of
1s, 0xfffffff, and the other field has the correct value.

The AHCI driver is implemented by attaching to the generic SCSI code and
translating on the fly between SCSI binary data structures and AHCI data
structures. It responds to requests to execute specific SCSI commands by
executing the equivalent AHCI commands and then crafting a response which
matches what a SCSI disk would send.

The AHCI driver now considers both fields and chooses the correct one when
implementing both the SCSI READ CAPACITY (10) and READ CAPACITY (16) commands.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Hung-Te Lin
b7a21b70d0 ahci: support scsi writing in AHCI driver
The "scsi write" command requires support from underlying driver.
This CL enables SCSI_WRITE10 in AHCI driver.

Tested in U-Boot console, try to i/o with sector #64:
scsi read 1000 40 1
md.b 1000 200 # check if things are not 0xcc
mw.b 1000 cc 200 # try to fill with 0xcc
scsi write 1000 40 1
mw.b 1000 0 200 # fill with zero
md.b 1000 200 # should be all 0
scsi read 1000 40 1
md.b 1000 200 # should be all 0xcc

Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Gabe Black
e81058c05b ahci: Make sending the SETFEATURES_XFER command optional
This command doesn't really do anything when talking to a SATA device, and
sending it confuses some of them. This change makes sending the command
optional, and defaults to not. The situations where it should be sent are not
the common case.

With the standard SSD in the machine, here are some times with the option
turned off:
1. 8277
2. 8273
3. 8050

And turned on:
1. 8303
2. 8155
3. 8276

Sending that command seems to have no meaningful effect on performance.

This fixes problems with an SSD marked Toshiba NV6424, Taiwan 11159AE P
and TC58NVG5D2FTA10.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
4e422bce8a ahci: cosmetics and cleanup
- print the correct speed
- print all the AHCI capability flags
(information taken from Linux kernel driver)
- clean up some comments

For example, this might show the following string:
AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>

Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
7ba7917c91 ahci: Improve AHCI debugging
- remove unused ssleep macro
- add some useful debugging information

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Stefan Reinauer
9a65b8754c ahci: Optimise AHCI controller reset and start-up
The existing code waits a whole second for the AHCI controller to reset.
Instead, let's poll the status register to see if the reset has
succeeded and return earlier if possible. This brings down the time for
AHCI probing from 1s to 20ms.

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:41 -07:00
Vadim Bendebury
284231e49a ahci: Support splitting of read transactions into multiple chunks
With an Intel AHCI controller, the driver does not operate properly
if the requested amount of blocks to read exceeds 255.

It is probably possible to specify 0 as the block count and the driver
will read 256 blocks, but it was decided to limit the number of blocks
read at once to 128 (it should be a power of 2 for the optimal
performance of solid state drives).

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-02 15:20:40 -07:00
Kumar Gala
a4941bdc24 drivers/block/ahci.c: Fix GCC 4.6 build warning
Fix:

ahci.c: In function 'ata_scsiop_read10':
ahci.c:564:6: warning: variable 'lba' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-16 20:53:18 +01:00
Marek Vasut
1a928ed964 GCC4.6: Squash warnings in ahci.c
ahci.c: In function 'ahci_port_start':
ahci.c:401: warning: format '%x' expects type 'unsigned int', but argument 2 has
type 'struct ahci_cmd_hdr *'

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-10-27 23:54:04 +02:00
Rob Herring
942e31437d scsi/ahci: add support for non-PCI controllers
Add support for AHCI controllers that are not PCI based.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Wolfgang Denk <wd@denx.de>
2011-07-26 00:06:58 +02:00
Rob Herring
e5a6c79d42 scsi/ahci: ata id little endian fix
The ata id string always needs swapping, not just on BE machines.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2011-07-26 00:06:08 +02:00
Kumar Gala
4c2e3da82d Update Freescale copyrights to remove "All Rights Reserved"
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
2009-07-29 09:59:22 +02:00
Kumar Gala
cb6d0b72c2 ahci: Fix gcc 4.4 compiler warning
ahci.c: In function 'ata_scsiop_read_capacity10':
ahci.c:616: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-23 21:04:58 +02:00
Becky Bruce
1785dbeed4 drivers/block/ahci: Fix pci mapping bug
The code assumes that the pci bus address and the virtual
address used to access a region are the same, but they might
not be.  Fix this assumption.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-10 00:31:05 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
1a02806c4b drivers/block: Move conditional compilation to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
33daf5b785 drivers/block : move block drivers to drivers/block
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-25 23:28:51 +01:00
Renamed from drivers/ahci.c (Browse further)