Add a field to the PCI emulator per-device data which records which device
is being emulated. This is useful when the emulator needs to check the
device for something.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/master to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
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Merge tag 'u-boot-atmel-2020.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features and fixes for 2020.01 cycle
The feature set includes support for two new boards from Microchip AT91:
The sama5d27_wlsom1_ek , an evaluation kit which includes the SAMA5D2
SOC packaged in a 256 MB LPDDR2 SIP, on a SOM including wireless, which
is placed on evaluation kit with sd-card, ethernet, LCD, Camera sensor,
QSPI, etc
The sam9x60ek, an evaluation kit for the new SoC based on ARM926j , the
SAM9X60 . The evaluation kit includes NAND flash, QSPI, Ethernet, Audio,
Camera sensor connector, etc.
The full support for sam9x60ek will come at a later time. There are
still missing bits regarding the clock support and power management
controller.
The major corrections in this pull request are:
Fixes for the SetVariable() boot service.
Device path node for NVMe drives.
Disable CONFIG_CMD_NVEDIT by default.
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Merge tag 'efi-2020-01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-01-rc1
The major corrections in this pull request are:
Fixes for the SetVariable() boot service.
Device path node for NVMe drives.
Disable CONFIG_CMD_NVEDIT by default.
For NXP SoCs we have to set pinmux configuration ASAP (ideally
before relocation) to get serial console working. Without this we miss
almost the half of output (U-boot version, CPU defails, Reset cause,
DRAM details etc.).
To achieve this we need to force appropriate pinctrl drivers to get
probed before relocation.
Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
On, i.MX8MQ, the PLL config must be done when ddrmix
isolation is released. So move the dram pll init after
iso config done. For other i.MX8M SOC, either init pll
before or after isolation is ok.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Refine the ddr init driver to make it more reusable for different
DDR type(LPDDR4, DDR4 & DDR3L). So we can reduce some redundant
code.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update the ddrc Qos setting for B1 to align with B0's setting.
Correct the initial clock for dram_pll. This setting will be
overwrite before ddr phy training. Although there is no impact
on the dram init, we still need to correct it to eliminate
confusion.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Tested-by: Robby Cai <robby.cai@nxp.com>
Since the parameter of dram_pll_init is changed, update to use new.
Also remove non-existed header file.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The write data size can be overwritten by writing to the IDATSZ
field of IPCR register. Since the driver always updates the IDATSZ
in page program operation. Set the LUT data size to 0 to align
the codes with iMX.
Signed-off-by: Ye Li <ye.li@nxp.com>
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller
is updated to have TDH field in FLSHCR register. According to reference
manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX
DDR delay logic won't be enabled.
Another issue in DDR mode is the MCR register will be overwritten in
every read/write/erase operation. This causes DDR_EN been cleared while
TDH=1, then no clk2x output for TX data shift and all operations will
fail.
Signed-off-by: Ye Li <ye.li@nxp.com>
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 4 bytes to ease copy firmware.
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ. This will be needed to be able to assert the PCIe
reset pins. Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add support for the power domain controller that's used on the
i.MX8MQ. This will be needed to be able to power on the PCIe
controller. Bindings taken from Linux, driver implementation
taken from the i.MX8 power domain controller and adjusted for
the i.MX8M SoC.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to
read states of gpio pins (and for example alter the boot flow).
It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match
requirements for SPL_OF_PLATDATA usage.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change replaces printf() with debug() for the notification about
commands timeouts.
This is done on purpose (also other drivers use such approach - dw_mmc.c,
mvebu_mmc.c), as the mmc core code (mmc.c) uses timeouts to assess if one
is using sd card or eMMC device.
In such situation timeout is a some kind of a "normal" behavior and there
shall not be any output to the console.
There is no impact on boot time for boards using this driver (even in SPL)
when two extra timeouts are returned (no SD card present, only eMMC
available).
Boot time tested with grabserial:
sudo grabserial -b 115200 -d /dev/ttyUSB1 -e 30 -t -m "^U-Boot SPL*"
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch converts the mxsmmc driver to support DM/DTS.
Moreover, it is also possible to use it in early SPL with
SPL_OF_PLATDATA enabled.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After this patch the mxs_spi.c DM/DTS driver can be used at early SPL to
read payload from SPI-NOR memories.
It was necessary to adjust its name to 'fsl_imx_2{38}_spi' to match
requirements for SPL_OF_PLATDATA usage.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Without this change the DM/DTS version of mxs_spi driver doesn't reset the
SPI IP block in probe.
As a result this driver (when used solely on U-Boot proper) relies on reset
performed by mxs spi driver in SPL.
In the use case where eMMC is used in SPL as a boot primary device, the
mxs_reset_block() is not called at all and DM/DTS aware SPI driver in
U-Boot proper is malfunctioning.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change initializes proper member of struct driver -
platdata_auto_alloc_size instead of priv_auto_alloc_size, which is setup
twice.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add sc_pm_is_partition_started to check whether a partition
has been started. This will be used to detect M4 partition booted up or
not, then we could choose which dtb to use. If M4 is up, we need
use dtb, such as imx8qm-mek-rpmsg.dtb.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX7 and i.MX8M use mxc uart driver, so let's make the SoC could
use MXC_UART kconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
fdtdec_get_addr_size could not parse addr/size correctly is
using address-cells 2 and size-cells 2 on an ARM32 SoC.
So switch to use devfdt_get_addr_size_index.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
At present these uclasses assumes that they are used with a device tree.
Update them to support of-platdata as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This function ise effectively replaced by ofnode_read_pci_addr() which
works with flat tree. Delete it to avoid code duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This parameter is needed by the PCI driver-mode interface but is always
NULL on x86. There are a number of calls to this function so it makes
sense to minimise the parameters.
Adjust the x86 function to omit the first parameter, and introduce stub
functions to handle the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this hedaer is only available on x86. To allow sandbox to use
it for testing, move it to a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.
Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI address transaction is not supported so drivers must
manually read the correct BAR after reading the device tree info. The
ns16550 has a suitable implementation, so move this code into the core
DM support.
Note that there is no live-tree equivalent at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the unclear comments in test.dts]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this fails silently which can be confusing since some devices
on the PCI bus may not work correctly. Show a message in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add a '\n' in the PCI autoconfig fail message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If PCI auto-config runs out of memory, show a few more details to help
diagnose the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change %x to %llx to avoid build warnings on some platforms]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
proper. For TPL and SPL we can normally used fixed BARs and save code size
and time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the debugging info a little to show the result of trying to bind
a PCI device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI emulation devices are not probed before use, since they
used to be children of the device that used them, and children cannot be
probed before their parents.
Now that PCI emulation devices are attached to the root node, we can
simply probe them, and avoid using the internal function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Sandbox pci works using emulation drivers which are currently children of
the pci device:
pci-controller {
pci@1f,0 {
compatible = "pci-generic";
reg = <0xf800 0 0 0 0>;
emul@1f,0 {
compatible = "sandbox,swap-case";
};
};
};
In this case the emulation device is attached to pci device on address
f800 (device 1f, function 0) and provides the swap-case functionality.
However this is not ideal, since every device on a PCI bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.
Worse, child devices cannot be probed before their parents. This forces
us to use 'find' rather than 'get' to obtain the emulator device. In fact
the emulator devices are never probed. There is code in
sandbox_pci_emul_post_probe() which tries to track when emulators are
active, but at present this does not work.
A better approach seems to be to add a separate node elsewhere in the
device tree, an 'emulation parent'. This could be given a bogus address
(such as -1) to hide the emulators away from the 'pci' command, but it
seems better to keep it at the root node to avoid such hacks.
Then we can use a phandle to point from the device to the correct
emulator, and only on sandbox. The code to find an emulator does not
interfere with normal pci operation.
Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. Update the existing
device trees and the code for finding an emulator.
This brings PCI emulators more into line with I2C.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 3 typos in the commit message;
encode bus number in the labels of swap_case_emul nodes;
mention commit 4345998ae9 in sandbox_pci_get_emul()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This function is useful in PCI emulators. More it into the header file to
avoid duplicating it in other drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This method is not used anymore since the bus/device/function of PCI
devices can be obtained from their (parent's per-child) platform data.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some functions and a struct should be marked static since they are not
used outside this file. Update them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
