Commit graph

11 commits

Author SHA1 Message Date
Patrick Delaunay
8aeba629cc pinctrl: stm32: update pincontrol for stmp32mp157
- add the 2 new compatible used by STM32MP157
	"st,stm32mp157-pinctrl"
	"st,stm32mp157-z-pinctrl"
- update the mask for the port

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrice Chotard
98693c22d9 pinctrl: stm32: add stm32f4 pinctrl compatible strings
STM32F4 SoCs uses the same pinctrl block as found into
STM32F7 and H7 SoCs.
We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl"
compatible string into pinctrl_stm32.c.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Patrice Chotard
092e72cbb3 pinctrl: stm32: add stm32h743-pinctrl compatible
STM32H7 SoCs uses the same pinctrl block as found into
STM32F7 SoCs

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-09-22 07:40:00 -04:00
Christophe Kerello
bb44b96803 pinctrl: stm32: add set_state ops
set_state_ops is kept under PINCTRL_FULL flag in order
to decrease memory footprint in some configuration.
PINCTRL_FULL can be enabled for debug purpose.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-07-10 14:26:02 -04:00
Christophe Kerello
ad0376e093 pinctrl: stm32: handle a configuration list
This patch handles a configuration list behind pinctrl-0
like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>;

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-07-10 14:26:02 -04:00
Simon Glass
da409ccc4a dm: core: Replace of_offset with accessor (part 2)
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Vikas Manocha
58fb3c8d89 stm32f7: increase the max no of pin configuration to 70
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:23 -04:00
Vikas Manocha
280057bd7d stm32f7: use stm32f7 gpio driver supporting driver model
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.

Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:21 -04:00
Vikas Manocha
774171020b dm: gpio: Add driver for stm32f7 gpio controller
This patch adds gpio driver supporting driver model for stm32f7 gpio.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Christophe KERELLO <christophe.kerello@st.com>
[trini: Add depends on STM32]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:57:02 -04:00
Vikas Manocha
94d5308412 PINCTRL: stm32f7: add pin control driver
This driver uses the same pin control binding as that of linux, binding
document of this patch is copied from linux. One addition done is for
GPIO input and output mode configuration which was missing.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-17 14:15:14 -04:00