Commit graph

1728 commits

Author SHA1 Message Date
Christophe Leroy
08dd988be5 powerpc, 8xx: fix missing function declarations.
Add missing .h and add missing declarations in .h
Declare local functions as static.  Make interrupt_init_cpu function
signatures consistent with how decrementer_count is declared.

Based on warnings reported by 'make C=2'

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
[trini: drop cpu_init_f as 8xx/83xx are different from the rest, rework
interrupt_init_cpu/decrementer_count]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-23 09:23:29 -04:00
Tom Rini
39632b4a01 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-07-18 08:42:48 -04:00
Stefano Babic
552a848e4f imx: reorganize IMX code as other SOCs
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic <sbabic@denx.de>

CC: Fabio Estevam <fabio.estevam@nxp.com>
CC: Akshay Bhat <akshaybhat@timesys.com>
CC: Ken Lin <Ken.Lin@advantech.com.tw>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Heiko Schocher <hs@denx.de>
CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Patrick Bruenn <p.bruenn@beckhoff.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Nikita Kiryanov <nikita@compulab.co.il>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: "Eric Bénard" <eric@eukrea.com>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Ye Li <ye.li@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Adrian Alonso <adrian.alonso@nxp.com>
CC: Alison Wang <b18965@freescale.com>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Martin Donnelly <martin.donnelly@ge.com>
CC: Marcin Niestroj <m.niestroj@grinn-global.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Adam Ford <aford173@gmail.com>
CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
CC: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Soeren Moch <smoch@web.de>
CC: Richard Hu <richard.hu@technexion.com>
CC: Wig Cheng <wig.cheng@technexion.com>
CC: Vanessa Maegima <vanessa.maegima@nxp.com>
CC: Max Krummenacher <max.krummenacher@toradex.com>
CC: Stefan Agner <stefan.agner@toradex.com>
CC: Markus Niebel <Markus.Niebel@tq-group.com>
CC: Breno Lima <breno.lima@nxp.com>
CC: Francesco Montefoschi <francesco.montefoschi@udoo.org>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Scott Wood <oss@buserror.net>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Simon Glass <sjg@chromium.org>
CC: "Andrew F. Davis" <afd@ti.com>
CC: "Łukasz Majewski" <l.majewski@samsung.com>
CC: Patrice Chotard <patrice.chotard@st.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Hans de Goede <hdegoede@redhat.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stephen Warren <swarren@nvidia.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: "Álvaro Fernández Rojas" <noltari@gmail.com>
CC: York Sun <york.sun@nxp.com>
CC: Xiaoliang Yang <xiaoliang.yang@nxp.com>
CC: Chen-Yu Tsai <wens@csie.org>
CC: George McCollister <george.mccollister@gmail.com>
CC: Sven Ebenfeld <sven.ebenfeld@gmail.com>
CC: Filip Brozovic <fbrozovic@gmail.com>
CC: Petr Kulhavy <brain@jikos.cz>
CC: Eric Nelson <eric@nelint.com>
CC: Bai Ping <ping.bai@nxp.com>
CC: Anson Huang <Anson.Huang@nxp.com>
CC: Sanchayan Maity <maitysanchayan@gmail.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Patrick Delaunay <patrick.delaunay@st.com>
CC: Gary Bisson <gary.bisson@boundarydevices.com>
CC: Alexander Graf <agraf@suse.de>
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12 10:17:44 +02:00
Lothar Waßmann
306dd7dabd net: fec_mxc: fix PHY initialization bug with CONFIG_DM_ETH
When CONFIG_DM_ETH is set, the FEC ethernet controller is reset after
the PHY has been set up and initialzed. This breaks the communication
with the PHY and results in an inoperable ethernet interface.

Do the initialization with CONFIG_DM_ETH in the same order as with
legacy ETH support to fix this.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-07-12 09:44:22 +02:00
Grygorii Strashko
750b34c9ae net: fm: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2017-07-11 22:41:48 -04:00
Grygorii Strashko
1ceac70080 net: phy: cortina: use get_nand_dev_by_index()
As part of preparation for nand DM conversion the new API has been
introduced to remove direct access to nand_info array. So, use it here
instead of accessing to nand_info array directly

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2017-07-11 22:41:48 -04:00
Philipp Tomsich
7ad326a905 rockchip: net: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the Gigabit Ethernet MAC (i.e. common designware driver and
rockchip-specific wrapper).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Christophe Leroy
53193a4f07 powerpc, 8xx: Add support for MCR3000 board from CSSI
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.

This patch adds support for the first board.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:06 -04:00
Christophe Leroy
fad51ac3af powerpc, 8xx: move FEC Ethernet driver in drivers/net
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:02 -04:00
Heiko Schocher
98f705c9ce powerpc: remove 4xx support
There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-07-03 17:35:28 -04:00
Tom Rini
de8203653f ti816x: Enable ethernet support
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family.  Enable the relevant plumbing.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-28 11:43:39 -04:00
Tom Rini
821560fd8e Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
2017-06-27 09:32:37 -04:00
Heiko Schocher
064b55cfcb powerpc, 5xxx, 512x: remove support for mpc5xxx and mpc512x
There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16 10:14:55 -04:00
Masahiro Yamada
51855e8981 treewide: remove unneeded semicolons
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-16 10:11:38 -04:00
Tom Rini
4f58002013 Merge git://git.denx.de/u-boot-mpc85xx 2017-06-14 18:53:03 -04:00
York Sun
ef621da7f8 net: phy: marvell: Fix init function for m88e1145
Commit a058052c changed the generic phy_reset() to clear all bits in
BMCR. This inevitably clears the ANEG bit. m88e1145 requires any
change to ANEG bit to be followed by a software reset. This seems to
be different from other PHYs. Implement read-modify-write procedure
for this PHY init.

Signed-off-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-12 12:18:14 -07:00
Heiko Schocher
5b8e76c35e powerpc, 8xx: remove support for 8xx
There was for long time no activity in the 8xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8xx,
so remove it (with a heavy heart, knowing that I remove
here the root of U-Boot).

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-12 08:37:55 -04:00
Simon Glass
6e2941d787 common: freescale: Move arch-specific declarations
The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 12:30:55 -04:00
Tom Rini
5cafcbab58 Merge git://git.denx.de/u-boot-net 2017-06-03 18:05:28 -04:00
Tom Rini
541f538f4c Merge git://git.denx.de/u-boot-fsl-qoriq 2017-06-03 18:05:04 -04:00
Paul Burton
2303bff7d5 net: pch_gbe: Add cache maintenance
On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
52e727c8eb net: pch_gbe: CPU accessible addresses are virtual
Use the virt_to_bus & bus_to_virt functions rather than phys_to_bus &
bus_to_phys, since the addresses accessed by the CPU will be virtual
rather than physical. On MIPS physical & virtual addresses differ as we
use virtual addresses in kseg0, and attempting to use physical addresses
directly caused problems as they're in the user segment which would be
mapped via the uninitialised TLB.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
db225f1131 net: pch_gbe: Fix rx descriptor buffer addresses
The loop to set up buffer addresses in rx descriptors always operated on
descriptor 0, rather than on each descriptor sequentially. Fix this in
order to setup correct buffer addresses for each descriptor.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
43979cbacb net: pch_gbe: Reset during probe
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Siva Durga Prasad Paladugu
f0b94c4bcd net: zynq_gem: Dont flush dummy descriptors
Dont flush dummy descriptors as they are already
allocated from a region with dcache off. Tested
this on Zynq(zc702) and ZynqMP(zcu102) boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Siva Durga Prasad Paladugu
dea004e41a net: zynq_gem: Use wait_for_bit with non breakable
Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Phil Edworthy
68e6ecadc5 net: phy: marvell 88e151x: Fix handling of RGMII interface types
The 88E1518 code is programming the wrong registers for rgmii-id,
rgmii-txid and rgmii-rxid interfaces.

Since the PHY defaults to rgmii-id, it would appear that the code
was previously only used with sgmii and rgmii-id interfaces.

Tested on 88E1512 PHY in rgmii-id mode which is from the same family
as 88E1518.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Sekhar Nori
96d1d84c79 drivers: net: cpsw: abort init() on aneg timeout
Abort CPSW driver init when auto-negotiation of link
times out. Currently, the code ignores return status
of phy_startup(), and goes ahead with network operation
(like DHCP) even though the link may be down.

Instead, abort init process if link is down or if there
is another error, so phy_startup() can easily be retried
again. This also helps quick fallback to next network interface
(like USB RNDIS) without inordinate delay.

Tested on AM571x IDK and AM335x BeagleBone black.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Wenyou Yang
6de046eaa7 net: macb: Fix GMAC not work when enable DM_ETH
Always search the PHY to determine the macb->phy_addr before using
the PHY to fix "No PHY present" error.

Fix the wrong test of the GMAC's phy interface mode, it should be
PHY_INTERFACE_MODE_RGMII.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Stefan Chulski
e09d0c8314 net: mvpp2.c: Enable 10G support for port 0 (SFI)
This patch fixes some remaining issues in the mvpp2 driver for the 10GB
support on port 0. These changes are:

- Incorrect PCS configuration
- Skip PHY configuration when no PHY is connected
- Skip GMAC configurations if 10G SFI mode set

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Madalin Bucur
cc1aa218f5 armv8/ls1046a: RGMII PHY requires internal delay on Tx
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:18 -05:00
Madalin Bucur
5a78a472f6 armv8/ls1043a: RGMII PHY requires internal delay on Tx
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:18 -05:00
Olliver Schinagl
b233089787 net: zynq_gem: Do not return -ENOSYS on success
The .read_rom_hwaddr net_ops hook does not check the return value, which
is why it was never caught that we are currently returning 0 if the
read_rom_hwaddr function return -ENOSYS and -ENOSYS otherwise.

In this case we can simplify this by just returning the result of the
function.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2017-06-02 14:44:18 -05:00
Jacob Chen
6ec922fae2 net: designware: Add phy supply support
Some board need a regulator for gmac phy, so add this code to handle it.
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:18 -05:00
Philipp Tomsich
449ea2cd0d net: Kconfig:make PHY_GIGE and individual Micrel PHYs selectable
This change migrate the following configuration options for Kconfig:
 * PHY_GIGE, indicates that a controller (with an appropriate PHY) is
   Gigabit capable and enables extra support in the miiutil for
   parsing the status of Gigabit PHYs
 * adds configuration options for Micrel KSZ9021 and KSZ9031 GbE PHYs,
   which previously had to enabled through a board-specific config file

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:18 -05:00
Bogdan Purcareata
1161dbcc0a drivers: net: fsl-mc: Include MAC addr fixup to DPL
Previous to MC v10.x, port mac address was specified via DPL. Since
newer MC versions are compatible with old style DPLs, make the u-boot
env mac addresses visible there. This applies only to DPLs that have
an older version.

DPLs use 32 bit values for specifying MAC addresses. U-boot
environment variables take precedence over the MAC addresses already
visible in the DPL/DPC.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-06-01 19:56:24 -07:00
Bogdan Purcareata
33a8991a87 drivers: net: fsl-mc: Link MC boot to PHY_RESET_R
DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a single mc_env_boot function in the MC driver,
since it's semantically tied to it.

Call the function in a per-board reset_phy hook, as it gets called at a
later moment, when all board PHY devices have been initialized.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-06-01 19:55:50 -07:00
Simon Glass
eed36609b5 fdt: Rename a few functions in fdt_support
These two functions have an of_ prefix which conflicts with naming used
in of_addr. Rename them:

   fdt_read_number
   fdt_support_bus_default_count_cells

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:11 -06:00
Simon Glass
150c5afe5b dm: gpio: Add live tree support
Add support for requesting GPIOs with a live device tree.

This involves adjusting the function signature for the legacy function
gpio_request_by_name_nodev(), so fix up all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes to stm32f746-disco.c:
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-01 07:03:10 -06:00
Simon Glass
45a26867e8 dm: core: Update device_bind_driver_to_node() to use ofnode
Adjust this function to us an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:08 -06:00
Simon Glass
911f3aef35 dm: core: Rename of_device_is_compatible()
The of_ prefix conflicts with the livetree version of this function.
Rename it to avoid problems when we add livetree support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:06 -06:00
Simon Glass
da409ccc4a dm: core: Replace of_offset with accessor (part 2)
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:04 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Jagan Teki
a43241a406 drivers: net: Kconfig: Add PHY_MICREL_KSZ9021 entry
Add kconfig entry for Micrel KSZ9021 PHY support.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-31 10:22:14 +02:00
Tom Rini
380e86f361 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-05-26 11:19:27 -04:00
Tom Rini
8dc1b17f14 Merge branch 'master' of git://git.denx.de/u-boot-nds32
Move FTMAC100 to where it should be, alphabetically in
drivers/net/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	drivers/net/Kconfig
2017-05-26 11:18:53 -04:00
Yogesh Gaur
42e8179007 driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() path
Earlier when MC is loaded but DPL is not deployed results in FDT
fix-up code execution hangs. For this case now print message on
console and return success instead of return -ENODEV. This update
allows fdt fixup to continue execution.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:24:59 -07:00
rick
be71a179bd nds32: eth: Support ftmac100 DM.
Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform.
Verification:
 Boot linux kernel via dhcp and bootm ok.

 NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000;
 NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin
 BOOTP broadcast 1
 BOOTP broadcast 2
 BOOTP broadcast 3
 BOOTP broadcast 4
 DHCP client bound to address 10.0.4.178 (4899 ms)
	Using mac@e0100000 device
	TFTP from server 10.0.4.97; our IP address is 10.0.4.178
	Filename 'boomimage-310y-ae300-spi.bin'.
	Load address: 0x600000
	Loading: #################################################################
	         #################################################################
	         #################################################################
...
...
	         ###################################
	         233.4 KiB/s
					 done
					 Bytes transferred = 13872076 (d3abcc hex)
	NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb
	BOOTP broadcast 1
	BOOTP broadcast 2
	BOOTP broadcast 3
	BOOTP broadcast 4
	DHCP client bound to address 10.0.4.178 (4592 ms)
	Using mac@e0100000 device
	TFTP from server 10.0.4.97; our IP address is 10.0.4.178
	Filename 'ae300.dtb'.
	Load address: 0x2000000
	Loading: #
	         82 KiB/s
					 done
					 Bytes transferred = 2378 (94a hex)
	NDS32 # bootm 0x600000 - 0x2000000
	 Image Name:
	 Created:      2017-03-22   6:52:03 UTC
	 Image Type:   NDS32 Linux Kernel Image (uncompressed)
	 Data Size:    13872012 Bytes = 13.2 MiB
	 Load Address: 0000c000
	 Entry Point:  0000c000
	 Verifying Checksum ... OK
	 Booting using the fdt blob at 0x2000000
	 Loading Kernel Image ... OK
	 Loading Device Tree to 01efc000, end 01eff949 ... OK
	 Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09)
	(gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) )
  #293 PREEMPT Wed Mar 22 14:49:28 CST 2017
	CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159)
...
...
Signed-off-by: rick <rick@andestech.com>
2017-05-23 13:48:27 +08:00
Marek Vasut
8ae51b6f32 net: ravb: Add Renesas Ethernet RAVB driver
Add driver for the Renesas Ethernet AVB block found in RCar H3/M3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Based on work of:
Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
2017-05-22 04:38:24 +09:00