Flyrecord tracing data are page aligned that's why it is necessary to
calculate alignment properly. Because trace_clocks description is the part
of record length it is necessary to have information about length earlier.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d3853d91b6fa7e3a1e5c24dd3c17335cf0041b5b.1694779918.git.michal.simek@amd.com
When flash erase is called with size parameter, code is checking
if sectors are locked or not. But for checking, the whole device
length minus offset is used instead of actual size which should
be erased. That's why when only some sectors are locked it is
not possible to erase unlocked sectors.
The length is calculated as "length = max_chipsize - offset",
flash_is_unlocked() api is getting updated with length which is
incorrect. Fix this flash_is_unlocked() api by passing the size
parameter.
ZynqMP> sf erase 0 100000
len=0x8000000 which is flash size
size=0x100000
We need to update the size in the flash_is_unlocked() api and not
the length.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230920025450.6281-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
When CONFIG_CMD_USB and CONFIG_USB are disabled, still some compilation
errors are seen as below.
In file included from include/configs/xilinx_zynqmp.h:173,
from include/config.h:3,
from include/common.h:16,
from env/common.c:10:
include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:302:9: note: in definition of macro
'BOOTENV_DEV_NAME_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/configs/xilinx_zynqmp.h:77:41: note: in expansion of macro
'BOOTENV_DEV_NAME'
77 | # define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
func(USB, usb, 1)
| ^~~~
include/configs/xilinx_zynqmp.h:168:9: note: in expansion of macro
'BOOT_TARGET_DEVICES_USB'
168 | BOOT_TARGET_DEVICES_USB(func) \
| ^~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:454:25: note: in expansion of macro
'BOOT_TARGET_DEVICES'
454 | "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
| ^~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:474:9: note: in expansion of macro
'BOOTENV_BOOT_TARGETS'
474 | BOOTENV_BOOT_TARGETS \
| ^~~~~~~~~~~~~~~~~~~~
include/configs/xilinx_zynqmp.h:179:9: note: in expansion of macro
'BOOTENV'
179 | BOOTENV
| ^~~~~~~
include/env_default.h:120:9: note: in expansion of macro
'CFG_EXTRA_ENV_SETTINGS'
120 | CFG_EXTRA_ENV_SETTINGS
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from env/common.c:32:
include/env_default.h:27:36: note: to match this '{'
27 | const char default_environment[] = {
| ^
scripts/Makefile.build:256: recipe for target 'env/common.o' failed
make[1]: *** [env/common.o] Error 1
Makefile:1853: recipe for target 'env' failed
make: *** [env] Error 2
make: *** Waiting for unfinished jobs....
Add CONFIG_USB_STORAGE as dependency for USB related macro's such as
BOOT_TARGET_DEVICES_USB() and DFU_DEFAULT_POLL_TIMEOUT and
CONFIG_THOR_RESET_OFF.
Remove CONFIG_ZYNQMP_USB from Kconfig and also from defconfig since it
is not used anywhere else.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230904031528.11817-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
When CONFIG_CMD_USB and CONFIG_USB are disabled some compilation errors are seen as below.
cmd/thordown.o: in function `usb_gadget_initialize':
include/linux/usb/gadget.h:981: undefined reference to `board_usb_init'
cmd/thordown.o: in function `do_thor_down':
cmd/thordown.c:68: undefined reference to `g_dnl_unregister'
cmd/thordown.o: in function `usb_gadget_release':
include/linux/usb/gadget.h:986: undefined reference to `board_usb_cleanup'
cmd/thordown.o: in function `do_thor_down':
cmd/thordown.c:41: undefined reference to `g_dnl_register'
cmd/thordown.c:48: undefined reference to `thor_init'
cmd/thordown.c:56: undefined reference to `thor_handle'
gnu/aarch64/lin/aarch64-linux/bin/aarch64-linux-gnu-ld.bfd: line 4: 8485
Segmentation fault (core dumped) $CC --sysroot=$LIBC
--no-warn-rwx-segment "$@"
Makefile:1779: recipe for target 'u-boot' failed
make: *** [u-boot] Error 139
make: *** Deleting file 'u-boot'
Add dependency of USB_GADGET_DOWNLOAD for CONFIG_CMD_THOR_DOWNLOAD to fix the errors.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/20230904031528.11817-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
For reference clocks, PM_CLK_GET_PARENT call is not allowed.
PM_CLK_GET_PARENT only allowed for MUX clocks. Rename the
versal_clock_ref() with versal_clock_get_ref_rate() for better
readability. Fix the versal_clock_get_ref_rate function by
passing the parent_id, and check whether the parent_id
belongs to ref_clk or pl_alt_ref_clk.
Also adding the function versal_clock_get_fixed_factor_rate()
if the clk_id belongs to the fixed factor clock.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230912033055.2549-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Correct the i2c address for si570 oscillator that generates the si570_user1
clock. i2c address was changed by commit b6a8c603d680 ("arm64: zynqmp: Fix
i2c addresses for vck190 SC") because address in node name wasn't aligned
with reg property. But actual 0x5f address is correct which is quite rare
because all other si570s are at 0x5d.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6f31881b0e2dd657f0d4ff0869c009c2e1224f22.1694441445.git.michal.simek@amd.com
Added no-wp DT property in OSPI flash node for all board dts & dtsi files
on which the WP# signal of the OSPI flash device is not connected. If this
property is set, then the software will avoid setting the status register
write disable (SRWD) bit in status register during status register
write operation.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e88dd7b9306bdf0738b2248bf9017e1997d25dc.1694441445.git.michal.simek@amd.com
xlnx,mio_bank was used in past but it was renamed to xlnx,mio-bank because
'_' in property shoudln't be used. There is no impact on the platform
because if the properly is not defined bank 0 is default. Bank 0 and 1 have
the same configuration that's why there shouldn't be any issue.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ace68d4b7701d1606a85cb18242409fce941b363.1694441445.git.michal.simek@amd.com
Current code expects bridge phy address at 0 which is not correct
expectation because bridge phy address is configurable.
That's why update the code to read reg property to figure it out
where bridge is and use it in phy creation code.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230915045043.4167628-1-tejas.arvind.bhumkar@amd.com
SOC can boot in the device which is not accessible from APU and running
this is detected as error which ends up in stopping boot process.
Boot mode detection and logic around is present to setup priority on boot
devices that SOC boot device is likely also used for booting OS.
Change logic to detect this case with showing message about it but don't fail
in boot process and don't prioritize boot device in this case.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230904032035.11926-4-venkatesh.abbarapu@amd.com
SOC can boot in the device which is not accessible from APU and running
this is detected as error which ends up in stopping boot process.
Boot mode detection and logic around is present to setup priority on boot
devices that SOC boot device is likely also used for booting OS.
Change logic to detect this case with showing message about it but don't fail
in boot process and don't prioritize boot device in this case.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230904032035.11926-3-venkatesh.abbarapu@amd.com
SOC can boot in the device which is not accessible from APU and running
this is detected as error which ends up in stopping boot process.
Boot mode detection and logic around is present to setup priority
on boot devices that SOC boot device is likely also used for booting OS.
Change logic to detect this case with showing message about it but don't
fail in boot process and don't prioritize boot device in this case.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230904032035.11926-2-venkatesh.abbarapu@amd.com
Location of bootscript in flash can be specified via /options/u-boot DT
node by using bootscr-flash-offset and bootscr-flash-size properties.
Values should be saved to script_offset_f and script_size_f variables.
Variables are described in doc/develop/bootstd.rst as:
script_offset_f
SPI flash offset from which to load the U-Boot script, e.g. 0xffe000
script_size_f
Size of the script to load, e.g. 0x2000
Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c
to identify bootscript location inside flash.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com
ofnode_read_bootscript_flash() reads bootscript address from
/options/u-boot DT node. bootscr-flash-offset and bootscr-flash-size
properties are read and values are filled. When bootscr-flash-size is not
defined, bootscr-flash-offset property is unusable that's why cleaned.
Both of these properties should be defined to function properly.
Also add test to cover this new function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/08a3e6c09cce13287c69ad370e409e7f1766b406.1693465465.git.michal.simek@amd.com
Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.
Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.
In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
gpio toggle gpio@ff0a000038
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ecd98b2a302c5c6628e0234482f23c38e721fd6.1693492064.git.michal.simek@amd.com
The bootscript is expected at a default address specific to each
platform.
When high speed memory like Programmable Logic Double Data Rate RAM
(PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr
may be loaded at a different offset. The offset needs to be set through
setenv. Due to the default values in some cases the boot.scr is falling
in between the kernel partition.
The bootscript address or the bootscript offset is fetched directly from
the DT and updated in the environment making it easier for automated
flows.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com
ofnode_read_bootscript_address() reads bootscript address from
/options/u-boot DT node. bootscr-address or bootscr-ram-offset properties
are read and values are filled. bootscr-address has higher priority than
bootscr-ram-offset and the only one should be described in DT.
Also add test to cover this new function.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/23be3838502efef61803c90ef6e8b32bbd6ede41.1693465140.git.michal.simek@amd.com
There is a chance that assigned-clock-rates is given and assigned-clocks
could be empty. Dont return error in that case, because the probe of the
corresponding driver will not be called at all if this fails.
Better to continue to look for it and return 0.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a9a9d853e0ac396cd9b3577cce26279a75765711.1693384296.git.michal.simek@amd.com
Kernel Address Space Layout Randomization (KASLR) is a hardening
feature that aims to make it more difficult to take advantage
of known exploits in the kernel, by placing kernel data
structures at a random address at each boot.The bootloader
supports randomizing the virtual address at which the kernel image
is loaded. The bootloader must provide entropy by passing a random
u64 value in the /chosen/kaslr-seed device tree node.
When we run "kaslrseed" command from U-Boot, the bootloader will
genarate the kaslr-seed and update the /chosen/kaslr-seed DT property.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230831031658.2203-4-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Kernel Address Space Layout Randomization (KASLR) is a hardening
feature that aims to make it more difficult to take advantage
of known exploits in the kernel, by placing kernel data structures
at a random address at each boot.The bootloader supports randomizing
the virtual address at which the kernel image is loaded.
The bootloader must provide entropy by passing a random u64 value
in the /chosen/kaslr-seed device tree node.
When we run "kaslrseed" command from U-Boot, the bootloader will
genarate the kaslr-seed and update the /chosen/kaslr-seed DT property.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230831032612.2729-4-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and
CONFIG_FPGA or CONFIG_SPL_FPGA are not enabled.
When CC_OPTIMIZE_FOR_DEBUG is enabled, unused code will not be optimized
out. Hence, fpga_load function must have a dummy implementation to avoid
the build error.
../common/spl/spl_fit.c:591: undefined reference to `fpga_load'
collect2: error: ld returned 1 exit status
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20230831075247.137501-1-chanho61.park@samsung.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Support for configuring TRISTATE parameter is added in ZYNQMP PMUFW(Xilinx
ZynqMP Platform Management Firmware) Configuration Param Set version 2.0.
If the requested configuration is TRISTATE then check the version before
requesting Xilinx firmware to set the configuration.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230811054829.13162-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add helper function to allow reading a single indexed u64 value from a
device-tree property containing multiple u64 values, that is an array of
u64's.
Co-developed-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/08043c8d204d0068f04c27de86afe78c75c50b69.1692956263.git.michal.simek@amd.com
Revision 2 is SW compatible with revision 1 but it is necessary to reflect
it in model and compatible properties which are parsed by user space.
Rev 2 has improved a power on boot reset and MIO34 shutdown glich
improvement done via an additional filter in the GreenPak chip.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6b9e68ebfb436da391daeb147f2a9985ac984c0c.1692951005.git.michal.simek@amd.com
All si570 mgt chips have factory default 156.25MHz but DT changed it to
148.5MHz. After tracking it is pretty much c&p fault taken from Zynq
zc702/zc706 boards where 148.5MHz was setup as default because it was
requirement for AD7511 chip available on these boards.
ZynqMP board don't contain this chip that's why factory default frequency
can be used.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c052ddf39e392e97f87f1c57ea06f3508733c672.1692947486.git.michal.simek@amd.com
Kernel Address Space Layout Randomization (KASLR) is a hardening
feature that aims to make it more difficult to take advantage
of known exploits in the kernel, by placing kernel data structures
at a random address at each boot.The bootloader supports randomizing
the virtual address at which the kernel image is loaded.
The bootloader must provide entropy by passing a random u64 value
in the /chosen/kaslr-seed device tree node.
When we run "kaslrseed" command from U-Boot, the bootloader will
genarate the kaslr-seed and update the /chosen/kaslr-seed DT property.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230824032712.13399-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
HBM stands for high bandwidth memory and is a type of memory interface used
in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka
graphics cards), as well as the server, high-performance computing (HPC)
and networking and client space. High Bandwidth Memory(HBM) has total 16
channels, one channel is divided into two pseudo channels which makes its
32 banks each with some amount of memory.
And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high
and pretty much there should be also place for PL DDR. So maximum number of
memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ed9eaf5c20501ee691d7d28a173511cd9a87f161.1690958095.git.michal.simek@amd.com
This moves the aes operation that is performed by the pmu into a
separate file. This way it can be called not just from the shell
command, but also e.g. from board initialization code.
Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com>
Link: https://lore.kernel.org/r/20230725072658.16341-1-christian.taedcke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The StarFive VisionFive 2 board cannot load spl/u-boot-spl.bin but needs a
prefixed header. We have referring to a vendor tool (spl_tool) for this
task. 'mkimage -T sfspl' can generate the prefixed file.
Use binman to invoke mkimage for the generation of file
spl/u-boot-spl.bin.normal.out.
Update the documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
The StarFive JH7110 base boards require a header to be prefixed to the SPL
binary image. This has previously done with a vendor tool 'spl_tool'
published under a GPL-2-or-later license. Integrate this capability into
mkimage.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
boot from SDIO3.0 (mmc sdcard) first if it is plugged.
If mmc is not plugged try to boot from emmc if it is plugged.
If emmc is not plugged then try to boot from nvme.
Signed-off-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Make NVMe and USB target boot devices on the StarFive VisionFive 2 board.
The boot devices are sorted by decreasing device speed.
CONFIG_PCI_INIT_R=y is set via [1]. 'start usb' is added to CONFIG_PREBOOT
by the same patch.
[1] [PATCH v1 1/2] configs: starfive: Enable PCIE auto enum and NVME/USB stuff for Starfive Visionfive 2
https://lore.kernel.org/u-boot/TY3P286MB2611C9AD6E5BB3756A959E89981FA@TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM/
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
