Commit graph

76775 commits

Author SHA1 Message Date
Patrick Delaunay
1c01712ac4 pinctrl: change result for unsupported API
Use the return value ENOSYS for unsupported API
- pinctrl_generic_set_state
- pinctrl_select_state

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Patrick Delaunay
2bd8830dfb scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txt
The helper macro CONFIG_IS_ENABLED and CONFIG_VAL are not real
configurations and they are no more present in u-boot.cfg so they can
be removed in config_whitelist.txt.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Patrick Delaunay
ff062765c2 scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfg
The two helpers macros CONFIG_IS_ENABLED and CONFIG_VAL are defined in
include/linux/kconfig.h but they are not real configurations; they can
be safely removed in the generated configuration file "u-boot.cfg".

This patch simplifies the comparison of this U-Boot configuration file.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2021-12-01 13:33:45 -05:00
Tom Rini
fc47dbb26e Merge branch '2021-12-01-Kconfig-migrations' into next
- Finish converting CONFIG_USE_BOOTCOMMAND, CONFIG_BOOTCOMMAND,
  CONFIG_RAMBOOTCOMMAND, CONFIG_NFSBOOTCOMMAND, all of
  CONFIG_SYS_[BO]R[0-7]_PRELIM, CONFIG_FSL_DDR_BIST and
  CONFIG_FSL_DDR_INTERACTIVE.
2021-12-01 13:32:35 -05:00
Tom Rini
33b02e93ec Convert CONFIG_FSL_DDR_BIST et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_DDR_BIST
   CONFIG_FSL_DDR_INTERACTIVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:11 -05:00
Tom Rini
c7fad78ec0 Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BR0_PRELIM
   CONFIG_SYS_OR1_PRELIM
   CONFIG_SYS_BR1_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR2_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR3_PRELIM
   CONFIG_SYS_OR3_PRELIM
   CONFIG_SYS_BR4_PRELIM
   CONFIG_SYS_OR4_PRELIM
   CONFIG_SYS_BR5_PRELIM
   CONFIG_SYS_OR5_PRELIM
   CONFIG_SYS_BR6_PRELIM
   CONFIG_SYS_OR6_PRELIM
   CONFIG_SYS_BR7_PRELIM
   CONFIG_SYS_OR7_PRELIM

This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms
that can set these values do so.  Add the relevant SYS_BRx_PRELIM_BOOL
to platforms that had not been previously migrated.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:10 -05:00
Tom Rini
970bf8603b Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USE_BOOTCOMMAND
   CONFIG_BOOTCOMMAND
   CONFIG_RAMBOOTCOMMAND
   CONFIG_NFSBOOTCOMMAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:10 -05:00
Tom Rini
7f3934fae5 - add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
 - enable simple framebuffer node for splashscreen for stm32mp1
 - use lower-case hex for address for stm32 MCU and MPU's device tree
 - define LOG_CATEGORY for stmfx pinctrl driver
 - add support for probing bus voltage level translator
 - add custom PHY reset bindings on AV96
 - enable KSZ90x1 PHY driver on DHCOR
 - stm32mp1 DDR update:
   - add DDR read data eye training
   - remove DDR calibration result
   - remove DDR tuning support
   - compute DDR size from DDRCTL registers
 - DHSOM boards:
   - increase USB power-good delay
   - add update_sf script to install U-Boot into SF
   - increase PHY auto-negotiation timeout to 20 seconds
   - fix SoM and board coding strap GPIO handling
   - auto-detect uSD level translator
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Merge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
- enable simple framebuffer node for splashscreen for stm32mp1
- use lower-case hex for address for stm32 MCU and MPU's device tree
- define LOG_CATEGORY for stmfx pinctrl driver
- add support for probing bus voltage level translator
- add custom PHY reset bindings on AV96
- enable KSZ90x1 PHY driver on DHCOR
- stm32mp1 DDR update:
  - add DDR read data eye training
  - remove DDR calibration result
  - remove DDR tuning support
  - compute DDR size from DDRCTL registers
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling
  - auto-detect uSD level translator
2021-12-01 07:22:25 -05:00
Patrick Delaunay
c7c06fa776 board: stm32mp1: add support of nor1 device in dfu command
Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit b7f060565e ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
b2ac9645e6 ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup
Since the commit f42045b2e7 ("stm32mp15: replace CONFIG_TFABOOT when
it is possible") the function stm32mp1_ddr_setup is always called so the
__maybe_unused can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
d72e7bbe7c ram: stm32mp1: compute DDR size from DDRCTL registers
Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.

This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
e84ee40b0b configs: stm32mp15: deactivate the CONFIG_STM32_IPCC
The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.

So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
8ad37e6f16 board: stm32mp1: enable simple framebuffer node for splashscreen
Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.

These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
6cdeb323b8 video: stm32: stm32_ltdc: align framebuffer on 2MB
Align the framebuffer size on MMU_SECTION_SIZE in kernel, = max 2MB for
LPAE for armV7, to avoid issue with the simple frame buffer activation,
when U-Boot add a reserved memory in the kernel device tree to preserve
the splash screen until Linux driver initialization.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
77debf61ef common: add fdt_simplefb_enable_and_mem_rsv function
Add a new function to activate an existing simple frame buffer node
and add the associated reserved memory, with no-map properties.

This device tree update is only done when the video device is active
and the video buffer is used.

This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because
gd->video_bottom and gd->video_top are only defined when CONFIG_DM_VIDEO
is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
2e2e6d8cac video: Add video_is_active function
Add the helper function video_is_active() to test if one video device
is active.

This function can be used in board code to execute operation
only when the display is probed / really used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
fded97adce common: rename functions lcd_dt_simplefb to fdt_simplefb
Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned
with the associated file name fdt_simplefb.h/fdt_simplefb.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
4ca979e314 common: rename lcd_simplefb.c file to fdt_simplefb.c
Rename the file lcd_simplefb.c to fdt_simplefb.c to be aligned
with the configuration name and with the associated include file
./include/fdt_simplefb.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
d71587c2ab Convert CONFIG_LCD_DT_SIMPLEFB to Kconfig
This converts the following to Kconfig:
   CONFIG_LCD_DT_SIMPLEFB

This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in
common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
b3c29dc9e5 stm32mp1: ram: remove tuning support
Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.

Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
9819fe345c stm32mp1: ram: remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
4831ba2903 stm32mp1: ram: add read valid training support
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.

This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
77d043cac6 ARM: dts: stm32: Auto-detect DHSOM with uSD level translator
The uSD level translator on DHSOM and Avenger96 are optional, however it
is possible to auto-detect it. This is done by setting SD CMD line high,
and then testing whether signal level on CK line matches the signal level
on CKIN line. If so, the uSD level translator is present, otherwise it is
not populated.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
8e5266eefd mmc: stm32_sdmmc2: Add support for probing bus voltage level translator
Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.

The translator test sets CMD high to avoid interfering with a card, and
then verifies whether signal set on CK is detected on CKIN. If the signal
is detected, translator is present, otherwise the CKIN feedback clock are
disabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
7d35a499bd ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
312011e8e7 ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
525dd34535 ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
5e3e882cf2 ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:27 +01:00
Marek Vasut
1aba8e51d8 ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:41:21 +01:00
Marek Vasut
15e20e4bdf ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:41:21 +01:00
Mike Karels
874e544e89 Fix MMC numbering issue for Raspberry Pi 3
Using mmc.dtbo from rpi-firmware to switch the controller for the SD
card slot from sdhci to sdhost causes the numbering to change; the
SD card is then not recognized at boot.  Add to the range checked.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:07:40 +01:00
Peter Robinson
5e7e6619c8 rpi: Add identifier for the new RPi Zero 2 W
The Raspberry Pi Foundation released the new Zero 2 W which we
want to detect, so we can detect the correct device tree file name.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:01:23 +01:00
Peter Robinson
3ede1a62a6 rpi: Update the Raspberry Pi doucmentation URL
The Raspberry Pi Foundation has updated their documentation so update
the URL to the latest place to find the HW device revision codes.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:00:54 +01:00
Tom Rini
4a14bfffd4 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- turris_omnia: enable A385 watchdog before disabling MCU watchdog
  (Pali)
- a37xx: Reset whole UART when changing parent clock from TBG to XTAL
  (Pali)
2021-11-30 08:59:22 -05:00
Tom Rini
ca819284d3 TPM2 API fixes
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Merge tag 'tpm-30112021' of https://source.denx.de/u-boot/custodians/u-boot-tpm

TPM2 API fixes

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-30 08:04:28 -05:00
Tom Rini
ce29c52891 Pull request for efi-2022-01-rc4
Documentation:
 
 * describe how to enable Virtio RNG on QEMU ARM
 
 UEFI:
 
 * enable testing the TCG2 protocol
 * support TPM event log passed from firmware
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Merge tag 'efi-2022-01-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4

Documentation:

* describe how to enable Virtio RNG on QEMU ARM

UEFI:

* enable testing the TCG2 protocol
* support TPM event log passed from firmware
2021-11-30 08:03:21 -05:00
Heinrich Schuchardt
c3de051c41 tis: fix tpm_tis_remove()
tpm_tis_remove() leads to calling tpm_tis_ready() with the IO region
unmapped and chip->locality == -1 (locality released). This leads to a
crash in mmio_write_bytes().

The patch implements these changes:

tpm_tis_remove(): Unmap the IO region after calling tpm_tis_cleanup().

tpm_tis_cleanup(): Request locality before IO output and releasing
locality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 14:11:05 +02:00
Patrick Delaunay
4c5956086a pinctrl: stmfx: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 11:20:34 +01:00
Patrice Chotard
0c6079c2a9 ARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
a2f823e49e ARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
fbe6b99d96 ARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
e114ddc385 ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
e447a18095 ARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
4aace3da3c ARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
f1a3eb59c8 ARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:59 +01:00
Patrice Chotard
b9a0cc8752 ARM: dts: stm32: Use lower-case hex for address for stm32mp15-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 11:15:58 +01:00
Ruchika Gupta
c0d9bb0b4a efi_loader: Extend PCR's for firmware measurements
Firmwares before U-Boot may be capable of doing tpm measurements
and passing them to U-Boot in the form of eventlog. However there
may be scenarios where the firmwares don't have TPM driver and
are not capable of extending the measurements in the PCRs.
Based on TCG spec, if previous firnware has extended PCR's, PCR0
would not be 0. So, read the PCR0 to determine if the PCR's need
to be extended as eventlog is parsed or not.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:49 +01:00
Ruchika Gupta
2957a1e224 tpm: use more algorithms than sha256 on pcr_read
The current tpm2_pcr_read is hardcoded using SHA256. Make the
actual command to TPM configurable to use wider range of algorithms.
The current command line is kept as is i.e limited to SHA-256 only.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:49 +01:00
Ruchika Gupta
34287efdaf efi_loader: Add check for event log passed from firmware
Platforms may have support to measure their initial firmware components
and pass the event log to u-boot. The event log address can be passed
in property tpm_event_log_addr and tpm_event_log_size of the tpm node.
Platforms may choose their own specific mechanism to do so. A weak
function is added to check if even log has been passed to u-boot
from earlier firmware components. If available, the eventlog is parsed
to check for its correctness and further event logs are appended to the
passed log.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:49 +01:00
Heinrich Schuchardt
3b7bf8a9e4 test: unit test for the EFI_TCG2_PROTOCOL
Encapsulate the UEFI EFI_TCG2_PROTOCOL unit test in an Python test.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-30 09:23:48 +01:00