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64960 commits

Author SHA1 Message Date
Tom Rini
9a3cc7b6d4 Pull request for UEFI sub-system for efi-2020-07-rc2-2
This patch contains error corrections and code simplifications for the UEFI
 sub-system.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAl6wUYIACgkQxIHbvCwF
 GsRVbBAAhYUjqjupFiAfBoqdWya1r1qc12QYkT/Udbq6hcPm7T+yKkPoMVXbzgV0
 3tABnntyrUhswMkqs9G0qL5aGmlwv4Lk55r0ImVEK6aRyDtgHibNMlPQ6/SyJ6n4
 WdiSf2zRs2XNK8XlUswStyNnbyRe+UEGYVrP6kD1ovYVymznP+RKEXK2NeqjV081
 4Jyf/GSVAdtpdmrkBamOwANB4z5VvcFIdG/ae32PMCKtJHv+FK5n7eLzKrRlpiMp
 UgRp5wJYPT2+eyqqCMzG7p2sS5MlFbQguAhp+8+HPZqTqVTR4e27eb0UWB5f/wWb
 p+GQIbtLOhsuWMsR5J1LvcZRs1OnVcGb8kPI+sZi1dHeKGHZ8rS364aH27bng1d6
 4DHUBxwydhF1GJIYsRu0s1jKiKdaKXh6CfErKvjdVEc/i4rWkMBbtMYxmSYDANdb
 rJ7ppCDcFg1uk2wyDw2F4eiRJlFF0CTSaYy9IVRxKRcQN6HIT7HEE/9yNG5H/xQ0
 zTohlvPJKtEIWP0T/mBKnqX7j4sU4oR7fSSPSOnARvsUVyXvI4XEHl1wbEmnK7qS
 OeT11FdGoKoP/DTQ4VIvSkddn7aIvYij/U0hTefJSksHEzwvLgq4Q5Y7ibvO2u9o
 PG3rlaKAwvJcVAEJO95c7iqh6lKyyaKwj//RtBsEaRXPQCYquYQ=
 =+u1X
 -----END PGP SIGNATURE-----

Merge tag 'efi-2020-07-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc2-2

This patch contains error corrections and code simplifications for the UEFI
sub-system.
2020-05-05 12:32:44 -04:00
Tom Rini
191ee8aac6 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- Add DM model for P1010RDB
- Add I2C DM Model support for P1010RDB, T1042RDB, T2080, T4240RDB,
  MPC8548CDS, T1024RDB, P4080, P3041DS, P2041RDB, P2020RDB, P1020RDB,
  P5040DS
- Fix reference to READM.qe_firmware
2020-05-05 09:08:53 -04:00
Tom Rini
425fefa9a3 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Support 64-bit U-Boot as the payload for coreboot x86
2020-05-04 11:06:14 -04:00
Tom Rini
a1f5f4ac20 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- 2 MVEBU related fixes
2020-05-04 11:05:48 -04:00
Tom Rini
143414c03f i.MX for 2020.07
----------------
 
 - imxrt: fix LCD clock, fix doc
 - new board: Coral Dev
 - imx8: enable Cache in SPL. SNVS, update SCFW API
 - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
 - MX6ULL : is_imx6ull to include i.MX6ULZ
 - Net: add config to enable TXC delay
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCXq07zQ8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76azngCdG7iFIXq3kg47qliAr44jIa4s/DUAnRzmSTut
 FuQlRhgXrY+Gh94FzrxN
 =MoOz
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- imxrt: fix LCD clock, fix doc
- new board: Coral Dev
- imx8: enable Cache in SPL. SNVS, update SCFW API
- imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
- MX6ULL : is_imx6ull to include i.MX6ULZ
- Net: add config to enable TXC delay

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
2020-05-04 09:29:42 -04:00
Daniel Schwierzeck
8510580f2e net: pcnet: fix I/O primitives for memory access
Commit 69529c9120 ("net: pcnet: Switch to PCI memory access")
switched from PCI IO access to PCI memory access without updating
the I/O primitives. Contrary to SH, the primitives for memory
access and IO access are implemented differently. Thus doing
memory access with IO port primitives breaks the driver on
MIPS Malta board.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-05-04 08:57:50 -04:00
Tom Rini
04da42770b Merge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- dts clean up to use -u-boot for px30, rk3399 boards
- dts sycn from upstream kernel for rk3328, rk3399
- add rockchip rng driver
- new board support: rk3328-roc-cc, rk3399-roc-pc,Nanopi M4 2GB
2020-05-04 07:28:14 -04:00
Tom Rini
1d5d0275d7 Merge branch 'next' of git://git.denx.de/u-boot-sh
This is part 1 of big network cleanup / DM conversion.
The dc2114x/rtl8139/pcnet/tulip PCI adapter drivers received checkpatch
cleanups in preparation for DM conversion. The smc911x is converted to
DM completely. The dwc_eth_qos cache fixes are applied.
2020-05-04 07:27:06 -04:00
Marek Vasut
20a154f95b mkimage: fit: Do not tail-pad fitImage with external data
There is no reason to tail-pad fitImage with external data to 4-bytes,
while fitImage without external data does not have any such padding and
is often unaligned. DT spec also does not mandate any such padding.

Moreover, the tail-pad fills the last few bytes with uninitialized data,
which could lead to a potential information leak.

$ echo -n xy > /tmp/data ; \
	./tools/mkimage -E -f auto -d /tmp/data /tmp/fitImage ; \
	hexdump -vC /tmp/fitImage | tail -n 3

before:
00000260  61 2d 6f 66 66 73 65 74  00 64 61 74 61 2d 73 69  |a-offset.data-si|
00000270  7a 65 00 00 78 79 64 64                           |ze..xydd|
                   ^^       ^^ ^^
after:
00000260  61 2d 6f 66 66 73 65 74  00 64 61 74 61 2d 73 69  |a-offset.data-si|
00000270  7a 65 00 78 79                                    |ze.xy|

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Tom Rini <trini@konsulko.com>
2020-05-04 07:26:57 -04:00
Heinrich Schuchardt
16ad946f41 efi_loader: change setup sequence
If we want to restore variables from disk, we need to initialize block
devices before variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:12 +02:00
Heinrich Schuchardt
5827c25458 test: stabilize test_efi_secboot
When setting up the console via function efi_console_register() we call
query_console_serial(). This functions sends an escape sequence to the
terminal to query the display size. The response is another escape
sequence.

console.run_command_list() is looking for a regular expression '^==>'.
If the escape sequence for the screen size precedes the prompt without a
line break, no match is found.

When efi_disk_register() is called before efi_console_register() this leads
to a test failuere of the UEFI secure boot tests.

We can avoid the problem if the first UEFI command passed to
u_boot_console.run_command_list() produces output. This patch achieves this
by appending '; echo' to the first UEFI related command of the problematic
tests.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
Heinrich Schuchardt
30f92ce9d5 efi_loader: correct comments for efi_status_t
EFI_STATUS is unsigned (UINTN). Hence it cannot be negative.
Correct comments for 'Return:'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
Heinrich Schuchardt
bb0e585c71 efi_loader: eliminate efi_set_(non)volatile_variable
Eliminate superfluous functions efi_set_volatile_variable() and
efi_set_nonvolatile_variable().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
Heinrich Schuchardt
c08cac0edc efi_loader: eliminate efi_get_(non)volatile_variable
Eliminate superfluous functions efi_get_volatile_variable() and
efi_get_nonvolatile_variable().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
Heinrich Schuchardt
a30c72319c cmd: efidebug: simplify UEFI protocol calls
We should not to refer to a function via the run-time or boot services
tables if the function is exported.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
AKASHI Takahiro
41fd506842 efi_loader: disk: add efi_disk_is_system_part()
This function will check if a given handle to device is an EFI system
partition. It will be utilised in implementing capsule-on-disk feature.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Add function description. Return bool.
Reviewed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
AKASHI Takahiro
f0ff75f249 efi_loader: factor out the common code from efi_transfer_secure_state()
efi_set_secure_stat() provides the common code for each stat transition
caused by efi_transfer_secure_state().

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Correct description of return value.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
AKASHI Takahiro
964d5326c9 efi_loader: fix unreachable statement in efi_sigstore_parse_siglist
"if (left < esl->signature_size)" is not reachable in a while loop.
But it is still valuable in case that a given signature database is
somehow corrupted. So fix the while loop condition.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
AKASHI Takahiro
e3f5c9cb0f lib/crypto, efi_loader: move some headers to include/crypto
Pkcs7_parse.h and x509_parser.h are used in UEFI subsystem, in particular,
secure boot. So move them to include/crypto to avoid relative paths.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Don't include include x509_parser.h twice.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
AKASHI Takahiro
7b8b63fb8e lib/crypto, efi_loader: avoid multiple inclusions of header files
By adding extra symbols, we can now avoid including x509_parser and
pkcs7_parser.h files multiple times.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Don't include include x509_parser.h twice.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-04 12:26:11 +02:00
Simon Glass
538437ed39 x86: Add a 64-bit 'coreboot64' build
Coreboot is a first-stage bootloader mostly used on x86 devices as an
alternative to UEFI. Coreboot runs in 32-bit mode.

U-Boot currently supports booting from coreboot as a second-stage
bootloader, also in 32-bit mode. However it is useful to be able to run
U-Boot in 64-bit mode. To do this we can have a 32-bit SPL which switches
over the CPU and jumps to a 64-bit U-Boot proper.

Add a new 'coreboot64' board for running 64-bit U-Boot from coreboot. This
uses binman to create an image with a 32-bit SPL and a 64-bit U-Boot.

This allows running 64-bit EFI images on x86, for example, without needing
a native U-Boot port for a board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Simon Glass
8d99d5434b cmd: Add an indication of 32/64-bit to bdinfo
It is useful to know what mode U-Boot is running in. Add a message at the
end of the 'bdinfo' output.

Suggested-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change commit tag to 'cmd' as this is not x86 specific]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Simon Glass
b4d4f592b2 x86: coreboot: Allow building an SPL image
Make a few adjustments to allow us to build an SPL image for coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Simon Glass
fc486371c3 x86: Update SPL for coreboot
At present SPL only works on bare-metal builds. With a few tweaks it can
be used for coreboot also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Simon Glass
37897c4073 x86: Move work-around out of cpu_jump_to_64bit_uboot()
At present this function copies U-Boot from the last 1MB of ROM. This is
not the right way to do it. Instead, the binman symbol should provide the
location.

But in any case the code should live in the caller,
spl_board_load_image(), so that the 64-bit jump function can be used
elsewhere. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Simon Glass
c2018cdd71 x86: Allow building an SPL image for coreboot
Coreboot runs in 32-bit mode and cannot run a 64-bit U-Boot. To get around
this we can build a combined image with 32-bit SPL and 64-bit U-Boot. Add
a build rule and binman definition for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Simon Glass
7ec0e7b635 x86: Move coreboot-table detection to common 32/64-bit code
At present this function is only available in 32-bit code. Move it to the
common cpu file so it can be used by 64-bit U-Boot too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-04 15:28:28 +08:00
Joel Johnson
b40745e5c2 cmd: mvebu: bubt: fix quoted string split across lines
Update quoted string alignment to address checkpatch.pl warning
originally introduced in
commit f60a66ef5d ("cmd: mvebu: bubt: show image boot device").

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-04 07:04:04 +02:00
Jakov Petrina
f49ac7e1c4 arm: dts: uDPU: switch default PHY speed to 3.125Gbit
This resolves issues with certain SFP modules.

Signed-off-by: Jakov Petrina <jakov.petrina@sartura.hr>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-05-04 07:04:04 +02:00
Biwen Li
9e36eae124 powerpc: dts: p1010: add i2c node
Add i2c node of p1010

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:37 +05:30
Heinrich Schuchardt
d76485b941 doc: fix references to README.qe_firmware
In two files README.qe_firmware is referenced which never made it into the
U-Boot tree. The README is available in the Linux kernel tree.

Update the references.

Cc: Timur Tabi <timur@kernel.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:37 +05:30
Hou Zhiqiang
fc888ac7d5 configs: P1010RDB: Enable PCIe driver
Enable the DM PCIe driver in P1010RDB defconfigs.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:37 +05:30
Hou Zhiqiang
9de7c76bba powerpc: P1010RDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled
for P1010RDB board.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:37 +05:30
Hou Zhiqiang
177edd82b2 powerpc: P1010RDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization reoutines for P1010RDB
boards only when DM_PCI is not enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:37 +05:30
Hou Zhiqiang
d2d019b7c3 powerpc: Enable device tree support for P1010RDB
Add device tree for P1010RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:37 +05:30
Biwen Li
a45fa9e800 configs: T1042D4RDB: enable DM_I2C and DM_RTC
This enables DM_I2C and DM_RTC in T1042D4RDB defconfigs,
except T1042D4RDB SECURE_BOOT defconfig

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
d2e3f7c608 dm: powerpc: T1040/T1042: add i2c DM support
This supports i2c DM for SoC T1040/T1042

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
613e66eb80 configs: T2080: enable DM_I2C
This enables DM_I2C in T2080 defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
8e4be6dfb7 dm: powerpc: T2080/T2081: add i2c DM support
This supports i2c DM for SoC T2080/T2081

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
30ea84768b configs: T4240RDB: enable DM_I2C
This enable DM_I2C in T4240RDB defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
e6bd72f880 dm: ppc: T4240: add i2c DM support
This supports i2c DM for SoC T4240

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
1321aef8cd configs: MPC8548CDS: enable DM_I2C
This enables DM_I2C in MPC8548CDS defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
01d97d5f18 dm: ppc: MPC8548CDS: add i2c DM support
This supports i2c DM for board MPC8548CDS

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
70571f981b configs: P1010: Enable DM_I2C and DM_RTC
Enable DM_I2C and DM_RTC in P1010RDB defconfigs,
except P1010RDB SECBOOT defconfigs.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
2703e640d2 dm: ppc: p1010: add i2c DM support
This supports i2c DM for SoC P1010

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
fe138b8a3f configs: T1024RDB: enable DM_I2C and DM_RTC
This enables DM_I2C and DM_RTC in T1024RDB defconfigs,
except T1024RDB SECURE_BOOT defconfig

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
9e9771a610 dm: powerpc: T1023/T1024: add i2c DM support
This supports i2c DM for SoC T1023/T1024

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
c556225407 configs: P4080DS: enable DM_I2C
This enables DM_I2C in P4080DS defconfigs,
except P4080DS SRIO_PCIE_BOOT and SECURE_BOOT defconfigs

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
369cb88505 powerpc: dts: P4080: add i2c node
This adds i2c node for SoC P4080

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30
Biwen Li
b4a46f279a configs: P3041DS: enable DM_I2C
This enables DM_I2C in P3041DS defconfigs,
except P3041DS SECURE_BOOT and SRIO_PCIE_BOOT defconfig

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-04 09:12:36 +05:30