Commit graph

9070 commits

Author SHA1 Message Date
Ralph Siemsen
e87c869db3 board: schneider: add RZN1 board support
Add support for Schneider Electric RZ/N1D and RZ/N1S boards, which
are based on the Reneasas RZ/N1 SoC devices.

The intention is to support both boards using a single defconfig, and to
handle the differences at runtime.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-05-13 04:01:30 +02:00
Simon Glass
b982f89c58 x86: samus: Adjust TPL start and pre-reloc memory size
Move the TPL up a little to make room for the refcode binary blob. Also
increase the pre-relocation memory to make space for recent additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:30 +08:00
Simon Glass
94c11e96fd x86: samus: Drop EFI_LOADER
This adds a lot of code so that it cannot be built with the binary
blobs. It is not used on this board. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
44dc33042f coreboot: Enable ms command
This is useful when looking for tables in memory. Enable it for coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
fa328446bc x86: nvme: coreboot: Enable NVMe
Enable support for NVMe storage devices. Update the driver to enable the
bus master bit, since coreboot does not do that automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
ea45ee1fc3 x86: coreboot: Log function names and line numbers
Turn these options on to make it easier to debug things.

Also enable dhrystone so we can get some measure of performance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
2cbc6aa47e x86: coreboot: Scan PCI after relocation
Enable this so that PCI devices can be used correctly without needing
to do a manual scan.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
b21626d4cb x86: coreboot: Use a memory-mapped UART
This is much more common on modern hardware, so default to using it.

This does not affect the normal UART, but does allow the debug UART to
work, since it uses serial_out_shift(), etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Tom Rini
0a9a4384c1 Merge tag 'u-boot-rockchip-20230509' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Rockchip NFC driver update and dev addr pointer api update;
- use standard dr_mode for usb driver;
- rock pi boards dts update;
- Add rk3566 Anbernic boards;
- Misc fixes for drivers;
2023-05-09 12:45:49 -04:00
FUKAUMI Naoki
1495bf17b8 configs: rockchip: add Radxa ROCK 4C+
add defconfig for Radxa ROCK 4C+.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-09 22:50:01 +08:00
FUKAUMI Naoki
5488a5b1db configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B
rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-09 22:50:01 +08:00
Tianling Shen
7000a60947 rockchip: rk3328: Add support for FriendlyARM NanoPi R2C
The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.

The device tree is taken from the kernel linux-next branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=004589ff9df5b75672a78b6c3c4cba93202b14c9

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-09 18:58:25 +08:00
Tom Rini
56a3a499f4 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-08 13:43:35 -04:00
Nikhil M Jain
5c64598bf7 configs: am62x_evm_a53_defconfig: Changes in memory to support SPL splash screen
To enable splash at A53 SPL, need to do memory map changes which
involves locate stack above malloc and have enough space to load bmp
image above stack. To load a 1920X1200 image a minimum of 8.8MB space is
needed, to support it move malloc down to 0x80b80000 from 0x80480000 and
bss to 0x80c80000 to have 1MB buffer between malloc and BSS.

Observed SPL size 195KB, CONFIG_SPL_SIZE_LIMIT set to 256KB.
Observed stack size 1904Bytes, CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK set
to 2KB.
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE config sets stack above the malloc
and reports for stack overflow.

Memory map at A53 SPL before splash screen
0x80000000+---------------------+
          |    Empty 512 KB     |
          |                     |
0x80080000+---------------------+
          |     Text Base       |
          |       352 KB        |
          |                     |
0x800D8000+---------------------+
          |                     |
          |                     |
          |    Empty 3.6MB      |
          |                     |
          |                     |
0x80477660+---------------------+
          |    Stack 2 KB       |
0x80477e60+---------------------+
          |     GD 416 Bytes    |
0x80478000+---------------------+
          |    Malloc 352 KB    |
          |                     |
0x80480000+---------------------+
          |                     |
          |                     |
          |                     |
          |                     |
          |   Empty 5.5 MB      |
          |                     |
          |                     |
          |                     |
          |                     |
0x80a00000+---------------------+
          |                     |
          |      BSS 512 KB     |
          |                     |
0x80a80000+---------------------+
          |                     |
          |                     |
          |                     |
          |                     |
          |   Empty 5.5 MB      |
          |                     |
          |                     |
          |                     |
          |                     |
0x81000000+---------------------+FIT Image load address

New memory map with splash screen at SPL
0x80000000+---------------------+
          |    Empty 512 KB     |
          |                     |
0x80080000+---------------------+
          |     Text Base       |
          |       352 KB        |
          |                     |
0x800D8000+---------------------+
          |    Empty 1.1MB      |
          |                     |
0x80200000+---------------------+
          |                     |
          |                     |
          |                     |
          |   BMP Image Load    |
          |                     |
          |       9.4 MB        |
          |                     |
          |                     |
          |                     |
          |                     |
          |                     |
          |                     |
0x80b77660+---------------------+
          |     Stack 2KB       |
0x80b77e60+---------------------+
          |    GD 416 Bytes     |
0x80b78000+---------------------+
          |                     |
          |    Malloc 352KB     |
0x80b80000+---------------------+
          |                     |
          |     Empty 1 MB      |
          |                     |
0x80c80000+---------------------+
          |     BSS 512 KB      |
          |                     |
0x80d00000+---------------------+
          |                     |
          |                     |
          |    Empty 3.0 MB     |
          |                     |
          |                     |
          |                     |
0x81000000+---------------------+FIT Image load addressi

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-05-08 09:26:12 -04:00
Tom Rini
1917a1a8a8 Merge branch 'for-2023.07-2' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
This pull request adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.
2023-05-07 09:44:27 -04:00
Chris Morgan
6cf6fe2537 board: rockchip: add Anbernic RGXX3 Series Devices
The Anbernic RGxx3 is a "pseudo-device" that encompasses the following
devices:

 - Anbernic RG353M
 - Anbernic RG353P
 - Anbernic RG353V
 - Anbernic RG353VS
 - Anbernic RG503

The rk3566-anbernic-rgxx3.dtsi is synced with upstream Linux, but
rk3566-anbernic-rgxx3.dts is a U-Boot specific devicetree that
is used for all RGxx3 devices.

Via the board.c file, the bootloader automatically sets the correct
fdtfile, board, and board_name environment variables so that the
correct devicetree can be passed to Linux. It is also possible to
simply hard-code a single devicetree in the boot.scr file and use
that to load Linux as well.

The common specifications for each device are:

 - Rockchip RK3566 SoC
 - 2 external SDMMC slots
 - 1 USB-C host port, 1 USB-C peripheral port
 - 1 mini-HDMI output
 - MIPI-DSI based display panel
 - ADC controlled joysticks with a GPIO mux
 - GPIO buttons
 - A PWM controlled vibrator
 - An ADC controlled button

All of the common features are defined in the devicetree synced from
upstream Linux.

TODO: DSI panel auto-detection for the RG353 devices (requires porting
of DSI controller driver and DSI-DPHY driver to send DSI commands to
the panel).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-06 17:45:05 +08:00
Christian Kohlschütter
c2d5edff91 rk3399: r4s: Derive local MAC address if EEPROM is missing
Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
provide an EEPROM chip containing a globally unique MAC address.

Currently, this means that a randomly generated temporary MAC address
may be generated each time the device is rebooted, leading to ARP cache
issues and other confusing bugs.

Since RK3399 CPUs provide a built-in unique serial number, we can
reliably derive a locally MAC address from it by reading the
corresponding bits from the non-secure efuse block.

Enable configuration options that allow deriving a local MAC address
from the CPU serial number.
2023-05-06 17:28:18 +08:00
Ehsan Mohandesi
eafbe16b01 test/py: IPv6 network discovery test
Test the IPv6 network discovery feature if indicated by boardenv file.

Signed-off-by: Ehsan Mohandesi <emohandesi@linux.microsoft.com>
Reviewed-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com>
2023-05-05 17:59:19 -04:00
Sean Edmond
29fb68c4ff net: dhcp6: Add a sandbox test for dhcp6
Requires proper environment with DHCP6 server provisioned.

Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-05-05 17:48:44 -04:00
Tom Rini
eb59ece520 Merge tag 'fsl-qoirq-2023-5-5' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
fsl-ls1088a device tree update
enable DM_SERIAL for ten64
check for crypto node first in fdt_fixup_remove_jr
2023-05-05 09:33:29 -04:00
Christophe Leroy
0ec8ebef87 board: cssi: Activate SMC relocation on CMPC885 board for MIAE device
When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.

In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.

Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is unused.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-05-05 07:26:53 +02:00
Mathew McBride
7fb6032bae configs: ten64: enable DM_SERIAL
The recent series "Convert LS1088A and LX2160 to DM_SERIAL"
from Ioana Ciornei provided the necessary support to enable
DM_SERIAL on the Ten64 board (LS1088A).

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05 09:46:03 +08:00
Manorit Chawdhry
bebe2f66f5 configs: j7200: Merge the HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-04 13:07:05 -04:00
Manorit Chawdhry
2cc4d4f853 configs: j721s2: Merge the HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-04 13:04:30 -04:00
Praneeth Bajjuri
8f3e2d14a6 configs: am62x: enable secure device configs by default
Enable the CONFIG_TI_SECURE_DEVICE by default

Non-HS devices will continue to boot due to runtime device type detection.

TI's security enforcing SoCs will authenticate each binary it loads by
comparing it's signature with keys etched into the SoC during the boot
up process. The am62x family of SoCs by default will have some level of
security enforcement checking. To keep things as simple as possible,
enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of
secure SoCs will work out of the box

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2023-05-04 13:03:54 -04:00
Christophe Leroy
019b39b736 board: cssi: Load CMPC885's motherboard FPGA earlier
In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().

This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.

Console is not available yet so remove the printfs.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-05-04 10:58:07 +02:00
Tom Rini
d30fbabade bk4r1: Enable LTO
In order to allow for general platform growth due to fixes, enable LTO
here to give us more room.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-03 18:30:46 -04:00
Tom Rini
2440719d25 u-boot-imx-20230503
-------------------
 
 - Fixes for : pico-imx6ul, smegw01
 - new boards: DMSSE20, Reform 2
 - fix: get_boot_device, PLL video rate
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211
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Merge tag 'u-boot-imx-20230503' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230503
-------------------

- Fixes for : pico-imx6ul, smegw01
- new boards: DMSSE20, Reform 2
- fix: get_boot_device, PLL video rate

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211
2023-05-03 13:15:12 -04:00
Dzmitry Sankouski
8144210e75 starqltechn: enable bootmenu
Needed for multiboot with vendor's Android.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
2023-05-03 09:05:24 -04:00
Dzmitry Sankouski
a2612d7c55 starqltechn: use button keyboard driver
Button keyboard driver used to navigate bootmenu entries.

Add gpio buttons, button keyboard driver.
Add gpio keys dts bindings.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-03 09:05:24 -04:00
Dzmitry Sankouski
6a0c30610c starqltechn: use 16x32 font
This font is more readable on high ppi display

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-03 09:05:24 -04:00
Yang Xiwen
33f19038cc arm: histb: hi3798mv200: add initial support for Hi3798MV200 HC2910-2AGHD05 board
A board with Hi3798MV200 SoC and various peripherals. Details are in the
board README.md.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03 09:05:24 -04:00
Tom Rini
7a3ee61f55 arm: Remove omap5_uevm board
This platform is unsupported by TI and was never widely distributed.  As
this is untested for a long while and missing some DM conversions,
remove it and related device tree files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-03 09:05:24 -04:00
Nitin Yadav
4d03f476a7 arm: mach-k3: Workaround errata ID i2331
Errata doc: https://www.ti.com/lit/pdf/sprz457
Errata ID i2331 CPSW: Device lockup when reading CPSW registers

Details: A device lockup can occur during the second read of any CPSW
subsystem register after any MAIN domain power on reset (POR). A MAIN
domain POR occurs using the hardware MCU_PORz signal, or via software
using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR.
After these resets, the processor and internal bus structures may get
into a state which is only recoverable with full device reset using
MCU_PORz.
Due to this errata, Ethernet boot should not be used on this device.

Workaround(s): To avoid the lockup, a warm reset should be issued after
a MAIN domain POR and before any access to the CPSW registers. The warm
reset realigns internal clocks and prevents the lockup from happening.
Workaround above errata by calling do_reset() in case of cold boot in
order to trigger warm reset. This needs enabling SYSRESET driver in R5
SPL to enable TI SCI reset driver.

Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-05-03 09:05:24 -04:00
Kishon Vijay Abraham I
bd52f45208 configs: j7200_evm_a72: Enhance bootcmd to configure ethernet PHY
Update the default BOOTCOMMAND to provide an automatic and easier way
to configure ethernet PHY before loading the firmware.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-05-03 09:05:24 -04:00
Frank Wunderlich
36cbd6b2eb configs: change bpi-r3 to board specific dts and change prompt
Use own devicetree for the board and change the prompt.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2023-05-03 09:05:24 -04:00
Linus Walleij
6f63c296fe board: Add new Broadcom Northstar board
This adds a simple Northstar "BRCMNS" board to be used with
the BCM4708x and BCM5301x chips.

The main intention is to use this with the D-Link DIR-890L
and DIR-885L routers for loading the kernel into RAM from
NAND memory using the BCH-1 ECC and using the separately
submitted SEAMA load command, so we are currently not adding
support for things such as networking.

The DTS file is a multiplatform NorthStar board, designed to
be usable with several NorthStar designs by avoiding any
particulars not related to the operation of U-Boot.

If other board need other ECC for example, they need to
create a separate DTS file and augment the code, but I don't
know if any other users will turn up.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Eduard Strehlau
fd20052662 smegw01: Fix fallback to altbootcmd
The bootcmd/altbootcmd mechanism is not invoked for bootmenus.
Manually compare bootcount and bootlimit to implement fallback on all
codepaths.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
e13698bb66 smegw01: Disable additional boot menu options
Defaults have changed, we do not want the bootmenu to contain EFI
options.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
a1bc4f1937 smegw01: Add lockdown U-Boot env support
Add lockdown U-Boot env support so that only certain U-Boot environment
variables are allowed to be modified.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
31c6c79a01 smegw01: Enable EMMC boot from multiple partitions
GPT Partition labels are used for determining the right
root filesystem to boot from.

The U-Boot environment is configured to reside in the eMMC hardware
boot partition we are currently booted from.

This should enable a dual copy approach for upgrading the bootloader.
One can overwrite the inactive hardware partition with new bootloader
and environment and afterwards switch the eMMC boot partition for an
atomic bootloader switch.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
440dc0694b smegw01: Run altbootcmd in the case of failure
Run the altbootcmd script if any step of bootcmd fails.

This ensures that always a valid image can be run.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
ac52bb99cc smegw01: Add altbootcmd
Add an altbootcmd script, which is convenient way to integrate with
swupdate and perform a roll back of the previous working version in the
case of update failure.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
3bb2b48ed2 smegw01: Select bootcount support
Add automatic boot counter that increases after every
reset. After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it is
disabled if bootlimit isn't set.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
21e81011a2 smegw01: Select CONFIG_CMD_SQUASHFS
Select CONFIG_CMD_SQUASHFS so that the SquashFS U-Boot commands
are available.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Oliver Graute
3bc6257e80 imx: support i.MX8QM DMSSE20 a1 board
Add i.MX8QM DMSSE20 a1 board support

U-Boot 2023.04-00030-g7be2f547b2 (Apr 21 2023 - 11:11:43 +0200)

Model: Advantech iMX8QM DMSSE20
Board: DMS-SE20A1 8GB
Build: SCFW 549b1e18, SECO-FW c9de51c0, ATF 5782363
Boot:  USB
DRAM:  8 GiB
Core:  100 devices, 19 uclasses, devicetree: separate
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:   eth0: ethernet@5b040000
Warning: ethernet@5b050000 (eth1) using random MAC address - 32:05:0c:f9:5e:10
, eth1: ethernet@5b050000
Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2023-05-02 10:57:32 +02:00
Fabio Estevam
b016fcf723 pico-imx6ul: Convert to CONFIG_DM_SERIAL
The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Patrick Wildt
ebe2e0c309 board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop.  In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM.  Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-05-02 10:57:22 +02:00
Christophe Leroy
f1dc0daf7a mpc83xx: Don't allow W and G bits in IBATs
The "Programming Environments Manual for 32-Bit Implementations of the
PowerPC™ Architecture" says "W and G bits are not defined for IBAT
registers. Attempting to write to these bits causes boundedly-undefined
results"

The "e300 Power Architecture™ Core Family Reference Manual" says the
same: "Neither the W or G bits of the IBAT registers should be set.
Attempting to write to these bits causes boundedly-undefined results."

Remove the possibility to set those bytes.

Fixes: 30915ab95d ("mpc83xx: Migrate BATS config to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Mario Six <mario.six@gdsys.cc>
2023-05-01 18:59:33 -04:00
Tom Rini
c960c0fd38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 11:50:26 -04:00