When the DDR3 speed goes higher, we need to utilize fine offset
from SPD.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Newer JEDEC DDR3 SPD Specifications define several additional values for
the DDR3 module_type field which were undefined when this code was
written. Update the code to handle the newer module types.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
ddr1_dimm_params.c: In function 'compute_ranksize':
ddr1_dimm_params.c:44: warning: format '%08x' expects type 'unsigned int', but
argument 2 has type 'long long unsigned int'
ddr2_dimm_params.c: In function 'compute_ranksize':
ddr2_dimm_params.c:43: warning: format '%08x' expects type 'unsigned int', but
argument 2 has type 'long long unsigned int'
ddr3_dimm_params.c: In function 'compute_ranksize':
ddr3_dimm_params.c:74: warning: format '%16lx' expects type 'long unsigned int',
but argument 2 has type 'long long unsigned int'
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Only use DDR DIMM part number if SPD has valid length, to prevent from
display garbage in case SPD doesn't cover these fields.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The numeric constants in the switch statements are replaced by #defines
added to the common ddr_spd.h header. This dramatically improves the
readability of the switch statments.
In addition, a few of the longer lines were cleaned up, and the DDR2
type for an SO-RDIMM module was added to the DDR2 switch statement.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.
Signed-off-by: York Sun <yorksun@freescale.com>
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.
Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Renamed from arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c (Browse further)
