Commit graph

22409 commits

Author SHA1 Message Date
Tom Rini
b3b6cc28c2 FIT improvements with split-elf, especially for Rockchip
Binman positioning by ELF symbol
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAmPTNLgRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreagiwgAr1Q+8qPghgomUK9cVjBuNzG2i88YWy7/
 oitshEE73lm92kP4YIQrSm1ZBy6mm0A0wyy4pRLC0fFrovzAWq1o7xfUEkuhxyTV
 pR7BiLPGUsHfL1cP4EuGSNMgrfX0QOddQgZTns4s7k4fbrFBLmTTa/+1jrU3AJNW
 1FVfVSc4eMqHM5gD7mfqSHRsxrbZDHpzbJEKIMS1xkVy/BSQbDWtF1f6Lri3M9VT
 Q7eNxFH5OptRAttcQreVNSNu28z00x0TuJNKLORXJa5AAxGW4yvNWgDFegU10NZc
 ADTKaNDsDz4D//Ar3PSt+10eGWWKqrY9ClQwls4lJmJJTIqldf+QDw==
 =l2A4
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-26jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm

FIT improvements with split-elf, especially for Rockchip
Binman positioning by ELF symbol
2023-01-26 21:57:38 -05:00
Tom Rini
b6904cc98a Merge https://source.denx.de/u-boot/custodians/u-boot-spi
- fix return code of sf command (Heinrich)
- fix register reads in STIG Mode (Dhruva)
- Infineon s25fs256t support (Takahiro)
2023-01-26 13:07:06 -05:00
Samuel Holland
c2e13aa9e1 dm: core: Use full printf() format when possible
Use a more accurate check for determining if the full format string will
be handled correctly, since SPL_USE_TINY_PRINTF can be disabled.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Takahiro Kuwano
87a6d86571 mtd: spi-nor: Add support for Infineon s25fs256t
Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
  - 4-byte address mode by factory default
  - Quad mode is enabled by factory default
  - Supports mixture of 128KB and 64KB sectors by OTP configuration
    (this patch supports uniform 128KB only)

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 21:07:45 +05:30
Takahiro Kuwano
eadaadbb8f mtd: spi-nor: Rename s25hx_t prefix
Rename s25hx_t prefix to s25 so that the single set of fixup hooks can
support all other S25 families.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 21:07:16 +05:30
Dhruva Gole
53f4ef0a4b spi: cadence_qspi: use STIG mode for small reads
Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.

For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
which provides access to external Flash devices.

The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for
OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit
mode enabled by default.

Thus, by default controller operates in 32 bit mode causing it to always
align all data to 4 bytes from a 4byte aligned address. In some flash
chips like cypress for example if we try to read some regs in DAC mode
then it keeps sending the value of the first register that was requested
and inorder to read the next reg, we have to stop and re-initiate a new
transaction.

This causes wrong register values to be read than what is desired when
registers are read in DAC mode. Hence if the data.nbytes is very less
then prefer STIG mode for such small reads.

[0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf

Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
[jagan: add tab space for comments]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 21:01:56 +05:30
Dhruva Gole
2330af2722 spi: cadence_qspi: setup ADDR Bits in cmd reads
Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read correct data from flash register that maybe requested by flash
driver because the controller doesn't even specify which address of the
flash register the read is being requested from.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 21:01:01 +05:30
Takahiro Kuwano
da16d72efd mtd: spi-nor-core: Make CFRx reg fields generic
Cypress defines two flavors of configuration registers, volatile and
non volatile, and both use the same bit fields. Rename the bitfields in
the configuration registers so that they can be used for both flavors.

Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 20:58:09 +05:30
Kunihiko Hayashi
358f803ae2 spi: Add Socionext F_OSPI SPI flash controller driver
Introduce Socionext F_OSPI controller driver. This controller is used to
communicate with slave devices such as SPI flash memories. It supports
4 slave devices and up to 8-bit wide bus, but supports master mode only.

This driver uses spi-mem framework for SPI flash memory access, and
can only operate indirect access mode and single data rate mode.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 20:53:20 +05:30
Pengfei Fan
730fcadc67 drivers: spi: sh_qspi.c: Use log_warning() instead of printf()
Use log_warning() instead of printf() to print out driver information

Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 20:53:20 +05:30
Pengfei Fan
d466f6209d drivers: spi: fix some typos
Fix some typos in spi drivers

Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26 20:53:20 +05:30
Tony Dinh
54a08c4139 ddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repository
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git

up to the commit "mv_ddr: a3700: Use the right size for memset to not overflow"
d5acc10c287e40cc2feeb28710b92e45c93c702c

This patch was created by following steps:

	1. Replace all a38x files in U-Boot tree by files from upstream github
	Marvell mv-ddr-marvell repository.

	2. Run following command to omit portions not relevant for a38x, ddr3, and ddr4:

	files=drivers/ddr/marvell/a38x/*
	unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_APN806 \
		-UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
		-UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \
		-UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DCONFIG_ARMADA_38X -UCONFIG_ARMADA_39X \
		-UCONFIG_64BIT $files

	3. Manually change license to SPDX-License-Identifier
	(upstream license in  upstream github repository contains long license
	texts and U-Boot is using just SPDX-License-Identifier.

After applying this patch, a38x, ddr3, and ddr4 code in upstream Marvell github
repository and in U-Boot would be fully identical. So in future applying
above steps could be used to sync code again.

The only change in this patch are:
	1. Some fixes with include files.
	2. Some function return and basic type defines changes in
	mv_ddr_plat.c (to correct Marvell bug).
	3. Remove of dead code in newly copied files (as a result of the
	filter script stripping out everything other than a38x, dd3, and ddr4).

Reference:
    "ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository"
    107c3391b9

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-01-26 07:30:20 +01:00
Tom Rini
17e8e58fe6 Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
This contains some fixes, and the first bunch of some clean up patches
to get rid of legacy GPIO and PMIC code.
Highlight is the DM AXP PMIC driver, which is required to convert some
drivers over to use DM regulators, and also is required to get rid
of some less optimal PMIC setup code in Trusted Firmware. This isn't
enabled by any defconfig yet, but can be enabled manually and works. For
the full glory some patches are still missing, and this requires more
testing, which would be simpler if the core code is upstream.
2023-01-24 21:07:01 -05:00
Simon Glass
eacc261178 bootstd: Add a new pre-scan priority for bootdevs
We need extensions to be set up before we start trying to boot any of the
bootdevs. Add a new priority before all the others for tht sort of thing.
Also add a 'none' option, so that the first one is not 0.

While we are here, comment enum bootdev_prio_t fully and expand the test
for the 'bootdev hunt' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:41 -05:00
Simon Glass
0c1f4a9fb1 bootstd: Add a SPI flash bootdev
Add a bootdev for SPI flash so that these devices can be used with
standard boot. It only supports loading a script.

Add a special case for the label, since we want to use "spi", not
"spi_flash".

Enable the new bootdev on sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:41 -05:00
Simon Glass
2b3ebf2013 ata: Don't try to use non-existent ports
The controller indicates the number of ports but also has a port map
which specifies which ports are actually valid. Make use of this to
avoid trying to send commands to an invalid port.

This avoids a crash on some controllers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
a60f7a3e35 bootstd: Add a virtio bootdev
Add a bootdev for virtio so that these devices can be used with standard
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
00fc8cade8 virtio: Add a block device
The test code for virtio is fairly simplistic and does not actually create
a block device. Add a way to specify the device type in the device tree.
Add a block device so that we can do more testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
902400201d virtio: Avoid strange behaviour on removal
This device does a check on removal which is better handled in the actual
test. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
811c81e889 virtio: Fix returning -ENODEV
This has a special meaning in driver model. There is clearly a device, so
it does not make sense to return this error code. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
59a6be9b11 virtio: Avoid repeating a long expression
Use a local variable to hold this name, to reduce the amount of code that
needs to be read.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
758c706c68 bootstd: Add an NVMe bootdev
Add a bootdev for NVMe so that these devices can be used with standard
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
0d77f8f1ca bootstd: Add an IDE bootdev
Add a bootdev for IDE so that these devices can be used with standard
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
8f090b67d0 bootstd: Add a SCSI bootdev
Add a bootdev for SCSI so that these devices can be used with standard
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
6febc26471 scsi: Remove all children of SCSI devices before rescanning
At present this only unbinds block devices of a certain type. But SCSI
device can have different types of children, including bootdevs.

Unbind all children so tht everything is clean and ready for a new scan.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
ca93d28171 scsi: Correct allocation of block-device name
This should be allocated so that it does not go out of scope. Fix this and
set the log category while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
843160fa7a bootstd: Add an MMC hunter
Add a hunter for MMC. This doesn't do anything at present, since MMC is
currently set up when U-Boot starts. If MMC moves to lazy init then we can
add a hunter function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
04fb2b6e45 bootstd: Add a USB hunter
Add a hunter for USB which enumerates the bus to find new bootdevs.

Update the tests and speed up bootdev_test_prio() while we are here, by
dropping the USB delays.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
ecdf3ab01f dm: usb: Mark the device name as alloced when binding
Since usb_find_and_bind_driver() allocates the device name it should tell
driver about that, to avoid memory leaks. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:40 -05:00
Simon Glass
b85fc8dbab bootstd: Add a default method to get bootflows
The code in these functions turns out to often be the same. Add a default
get_bootflow() function and allow the drivers to select it by setting
the method to NULL.

This saves a little code space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:39 -05:00
Simon Glass
3a2cb96e5d dm: mmc: Use bootdev_setup_sibling_blk()
At present MMC uses the bootdev_setup_for_dev() function to set up the
bootdev. This is because MMC only has one block-device child, so does not
need to worry about naming of the bootdev.

However this inconsistency with other bootdevs that use block devices is a
bit annoying. The only real reason for it is to have a name like
'mmc0.bootdev' instead of 'mmc0.blk.bootdev'.

Update bootdev_setup_sibling_blk() to drop '.blk' from the name where it
appears, thus removing the only reason to use the bootdev_setup_for_dev().
Switch MMC over to the subling function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:39 -05:00
Simon Glass
d0075059e4 ide: Drop non-DM code for BLK
We require CONFIG_BLK to be enabled now, so this code is unused. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:39 -05:00
Simon Glass
67bb973122 sandbox: mmc: Start off with a zeroed file
When running multiple tests the mmc emulator calls malloc() to obtain the
memory for its disk image. Since the memory is not cleared, it is possible
that it happens to contain a partition table.

The dm_test_part() test (for one) relies on mmc0 being empty on startup.
Zero the memory to ensure that it is.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:39 -05:00
Simon Glass
3d01254140 dm: core: Support sorting devices with dm tree
Add a -s flag to sort the top-level devices in order of uclass ID.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23 18:11:39 -05:00
Jernej Skrabec
cd108f2795 video: sunxi: dw-hdmi: Read address from DT node
Currently HDMI controller MMIO address is hardcoded. Change that so
address is read from DT node. That will make adding support for new
variants a bit easier.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2023-01-23 01:18:31 +00:00
Jernej Skrabec
2f52be8b8d video: sunxi: dw-hdmi: Probe driver by compatible
Currently the sunxi dw-hdmi driver is probed unconditionally,
even if there is no such device.

Switch the driver to probing via a compatible string. This brings many
benefits; the driver is only probed when needed, and now it can read the
DT node.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2023-01-23 01:18:31 +00:00
Samuel Holland
77024aa7d9 clk: sunxi: Add DE2 display-related clocks/resets
Add clock/reset definitions for display-related peripherals, including
the display engine, TCONs, and DSI and HDMI encoders, so those drivers
can be converted to DM clock consumers instead of directly manipulating
the CCU registers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2023-01-23 01:18:31 +00:00
Samuel Holland
55ad509c11 power: pmic: axp: Bind regulators from the DT
Now that a regulator driver exists for this PMIC, hook it up to the
device tree "regulators" subnodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-01-23 01:18:31 +00:00
Samuel Holland
27a93dd4a9 power: regulator: Add a driver for AXP PMIC regulators
This driver handles most voltage regulators found in X-Powers AXP PMICs.
It is based on, and intended to replace, the regulator driver in TF-A.

AXP PMIC regulators can be divided into 6 categories:
 - Switches without voltage control => fully supported.
 - Single linear range => fully supported.
 - Two linear ranges, "step" and "2 * step" => fully supported.
 - Two linear ranges, "step" and "5 * step" => only the first range is
   supported. No boards are known to use the second range.
 - Non-linear voltage values => fully supported.
 - LDOs shared with GPIO pins => not supported.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-01-23 01:18:31 +00:00
Samuel Holland
dc1b1d1458 power: pmic: axp: Provide a variant ID in the driver data
Subordinate regulator drivers can use this enumerated ID instead of
matching the compatible string again.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-01-23 01:18:31 +00:00
Andre Przywara
ba16b53101 sunxi: mmc: group non-DM specific functions
As the SPL code for sunxi boards does not use the driver model, we have
two mmc_ops structures, one for DM, one for non-DM. The actual hardware
access code is shared, with the respective callback functions using that
common code.

To make this more obvious and easier to read, reorder the functions to
group them: we first have the common code, then the non-DM bits, and
the proper DM implementation at the end.
Also document this structure in the comment at the beginning of the file.

No functional change intended.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Andre Przywara
5db81f1cc8 sunxi: mmc: ignore card detect in SPL
The sunxi MMC code does not use the DM in the SPL, as we don't have a
device tree available that early, also no space for it.
This also means we cannot access the card-detect GPIO information from
there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each
board has to define. This is a burden, also requires extra GPIO code in
the SPL.
As the SPL is the natural successor of the BootROM (from which we are
loaded), we can actually ignore the CD pin completely, as this is what
the BootROM does as well: CD GPIOs are board specific, but the BootROM
is not, so accesses the MMC devices anyway.
Also, as we must have been loaded from an MMC device when reaching this
code, there must have been a card in the slot.

Remove the card detect code from the non-DM implementation of the sunxi
MMC driver, to get rid of this unneeded code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
ad24234468 watchdog: Clean up defaults for imx_watchdog / ulp_wdog
In imx_watchdog, clean up the comment to just note the range now, as we
do not need to set the default here as Kconfig does this for us. For
ulp_wdog, set the default value via Kconfig instead.

Cc: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-01-20 12:27:23 -05:00
Tom Rini
c50c778ea7 usbtty: Remove default CONFIG_USBD_* values
For this legacy driver, the only user sets these values in Kconfig, so
we can remove them from the header.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:23 -05:00
Tom Rini
89c90cadf3 nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
asked in arch/Kconfig.nxp.  Set the PowerPC defaults based on
arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in
drivers/mtd/nand/raw/fsl_ifc_nand.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
bd22bde92e net: phy: mv88e61xx: Finish migration of MV88E61XX_FIXED_PORTS
Set the default for MV88E61XX_FIXED_PORTS to 0x0 in Kconfig, and move
the comment from code to the help to explain what this does.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-01-20 12:27:06 -05:00
Tom Rini
8de73b7bc1 usb: musb: Rename CONFIG_USB_MUSB_TIMEOUT to MUSB_TIMEOUT
This variable has never been configured to another value at present, and
was not converted to Kconfig. Opt instead to rename this to
MUSB_TIMEOUT.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-20 12:27:06 -05:00
Tom Rini
8fe042be9a fpga: Migrate CONFIG_MAX_FPGA_DEVICES to Kconfig
This is always defined to 5, so use that as the default.

Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
2023-01-20 12:27:06 -05:00
Tom Rini
81451a3985 i2c: fsl_i2c: Rework usage of CONFIG_SYS_IMMR
This driver is used on both m68k, where CONFIG_SYS_IMMR is not used, and
PowerPC an ARM where it is. Abstract this to a new value rather than
re-defining a CONFIG symbol on m68k.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00