Commit graph

18804 commits

Author SHA1 Message Date
Marek Vasut
06183ac5f5 pci: renesas: Fix BAR mapping on Gen3
Because the first PCIExAR(n) register is configured with the mapping,
It is the second PCIExAR(n) register that must be written with 0, not
the last one. Update the n from 4 to 1 to select the correct register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20 22:38:28 +01:00
Marek Vasut
b169ef1798 pci: renesas: Make map address and mask power of two on Gen3
Both the map address and mask must be power of two per documentation,
adjust the code accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20 22:38:28 +01:00
Marek Vasut
b9616d8f90 pci: renesas: Add root bus handling on Gen3
Add code to access the PCIe root bus space and configure it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20 22:38:28 +01:00
Jaehoon Chung
9d7e6611a0 mmc: rockchip_dw_mmc: use mmc_pwrseq instead of rockchip_mmc_pwrseq
Use mmc_pwrseq instead of rockchip_mmc_pwrseq.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:11:08 +08:00
Jaehoon Chung
a96ea4d8d5 mmc: meson_gx_mmc: use mmc_pwrseq instead of meson_mmc_pwrseq
Use mmc_pwrseq instead of meson_mmc_pwrseq.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-19 15:10:46 +08:00
Jaehoon Chung
caee38aef7 mmc: pwrseq: add mmc-pwrseq file to provide a generic interface
Add mmc-pwrseq file to provide a generic interface.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:10:41 +08:00
Bin Meng
46938abd2c mmc: mmc_spi: Document the 3 local functions
mmc_spi_sendcmd(), mmc_spi_readdata() and mmc_spi_writedata() are
currently undocumented. Add comment blocks to explain the arguments
and the return value.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:08:03 +08:00
Bin Meng
2f22cb40e5 mmc: mmc_spi: Fix potential spec violation in receiving card response
After command is sent and before card response shows up on the line,
there is a variable number of clock cycles in between called Ncr.
The spec [1] says the minimum is 1 byte and the maximum is 8 bytes.

Current logic in mmc_spi_sendcmd() has a flaw that it could only work
with certain SD cards with their Ncr being just 1 byte.

When resp_match is false, the codes try to receive only 1 byte from
the SD card. On the other hand when resp_match is true, the logic
happens to be no problem as it loops until timeout to receive as many
bytes as possible to see a match of the expected resp_match_value.
However not every call to mmc_spi_sendcmd() is made with resp_match
being true hence this exposes a potential issue with SD cards that
have a larger Ncr value.

Given no issue was reported as of today, we can reasonably conclude
that all cards being used on the supported boards happen to have a 1
byte Ncr timing requirement. But a broken case can be triggered by
utilizing QEMU to emulate a larger value of Ncr (by default 1 byte
Ncr is used on QEMU). This commit fixes such potential spec violation
to improve the card compatibility.

[1] "Physical Layer Specification Version 8.00"
     chapter 7.5.1: Command / Response
     chapter 7.5.4: Timing Values

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:07:53 +08:00
Bin Meng
781aad0de9 mmc: mmc_spi: Move argument check to the beginning of mmc_spi_sendcmd()
The argument check should happen before any transfer on the SPI lines.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:07:30 +08:00
Bin Meng
01962f8d7c mmc: mmc_spi: Print verbose debug output when crc16 check fails
Add some verbose debug output when crc16 check fails.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:06:53 +08:00
Stefan Bosch
8e2b0af721 mmc: fix response timeout after switch command
After issuing the switch command: Wait until 'current state' of the card
status becomes 'tran'. This prevents from response timeout at the next
command because of 'current state' = 'data'.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:04:15 +08:00
Yuezhang.Mo@sony.com
37e1362efc mmc: sdhci: skip cache invalidation if DMA is not used
If DMA(SDMA or ADMA) is not used, the cache invalidation
after reading is no need, should be skipped. Otherwise
U-Boot may hang at the cache invalidation.

Found this issue and tested this fix on DragonBoard 410c.

Fixes: commit 4155ad9aac ("mmc: sdhci: fix missing cache invalidation after reading by DMA")

Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Andy Wu <Andy.Wu@sony.com>
2021-02-19 15:03:25 +08:00
Jaehoon Chung
52ff04a216 mmc: initialize an err variable
Initialize an err variable to 0.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reported-by: Coverity (CID: 313548)
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-19 14:59:28 +08:00
Nicolas Saenz Julienne
0059ef0be9 video: arm: rpi: Add brcm,bcm2711-hdmi0 compatible
The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of
'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6
instead of VC4). This has no functional change as far as u-boot driver
is concerned. So simply add the compatible string.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:59:08 +01:00
Nicolas Saenz Julienne
c89c96d322 mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys()
This will allow us to use DM variants of phys_to_bus()/bus_to_phys()
when relevant.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:59:08 +01:00
Nicolas Saenz Julienne
1a474559d9 xhci: translate virtual addresses into the bus's address space
So far we've been content with passing physical addresses when
configuring memory addresses into XHCI controllers, but not all
platforms have buses with transparent mappings. Specifically the
Raspberry Pi 4 might introduce an offset to memory accesses incoming
from its PCIe port.

Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these
limitations, and make sure we don't break non DM users.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: fix compilation for 32 bit]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>

fix from nicolas
2021-02-18 11:56:26 +01:00
Nicolas Saenz Julienne
4abf68d57d dm: Introduce DMA constraints into the core device model
Calculating the DMA offset between a bus address space and CPU's every
time we call phys_to_bus() and bus_to_phys() isn't ideal performance
wise, as it implies traversing the device tree from the device's node up
to the root. Since this information is static and available before the
device's initialization, parse it before the probe call an provide the
DMA offset in 'struct udevice' for the address translation code to use
it.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
51bdb50904 dm: Introduce xxx_get_dma_range()
Add the following functions to get a specific device's DMA ranges:
 - dev_get_dma_range()
 - ofnode_get_dma_range()
 - of_get_dma_range()
 - fdt_get_dma_range()
They are specially useful in oder to be able validate a physical address
space range into a bus's and to convert addresses from and to address
spaces.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
c709243ee0 pci: pcie-brcmstb: Fix inbound window configurations
So far we've assumed a fixed configuration for inbound windows as we had
a single user for this controller. But the controller's DMA constraints
were improved starting with BCM2711's B1 revision of the SoC, notably
available in CM4 and Pi400. They allow for wider inbound windows. We can
now cover the whole address space, whereas before we where limited to
the lower 3GB.

This information is passed to us through DT's 'dma-ranges' property and
it's specially important for us to honor it since some interactions with
the board's co-processor assume we're doing so (specifically the XHCI
firmware load operation, which is handled by the co-processor after
u-boot has correctly configured the PCIe controller).

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
85f3fddbcc pci: brcmstb: Cleanup controller state before handover
Make sure we handover the PCIe controller in a clean state. Some of the
devices hanging from the PCIe bus might need to be properly reset
through #PERST in order for Linux to be able to initialize them.

This is specially important in order to properly initialize Raspberry Pi
4 B and 400's USB chip.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
e3bbc1f74e usb: xhci-pci: Add DM_FLAG_OS_PREPARE flag
The PCIe bus the controller is connected to might need to be removed
prior the handover. Make sure xhci-pci is also removed so as to avoid
unexpected timeouts or hangs.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Matthias Brugger
1613cf506c config: Enable iProc RNG200 driver in RPi4 configs
We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
config so that it can be used.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: drop rpi_4_32b_defconfig]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:20 +01:00
Matthias Brugger
537f00182f rng: Add iProc RNG200 driver
Add support for random number generator RNG200.
This is for example found on RPi4.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: adapt to new struct driver memebers]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-16 23:24:06 +01:00
Alex Marginean
71a2d1e7b8 drivers: net: Add Felix DSA switch driver
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-02-16 12:38:36 -05:00
Claudiu Manoil
fc054d563b net: Introduce DSA class for Ethernet switches
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-02-16 11:48:20 -05:00
Vladimir Oltean
d0781c95bc net: phy: introduce fixed_phy_create for DSA CPU ports
The DSA (Distributed Switch Architecture) implementation has made a
design decision when it got introduced to the Linux kernel in 2008.
That was to hide away from the user the CPU-facing Ethernet MAC, since
it does not make sense to register it as a struct net_device (UCLASS_ETH
udevice for U-Boot), because that would never be beneficial for a user:
they would not be able to use it for traffic, since conceptually, a
packet delivered to the CPU port should loop back into the system.

Nonetheless, DSA has had numerous growing pains due to the lack of a
struct net_device for the CPU port, but so far it has overcome them.
It is unlikely at this stage of maturity that this aspect of it will
change.

We would like U-Boot to present the same information as Linux, to be at
parity in terms of number of interfaces, so that ethNaddr environment
variables could directly be associated between U-Boot and Linux.
Therefore, we would implicitly like U-Boot to hide the CPU port from the
user as well.

But the paradox is that DSA still needs a struct phy_device to inform
the driver of the parameters of the link that it should configure the
CPU port to. The problem is that the phy_device is typically returned
via a call to phy_connect, which needs an udevice to attach the PHY to,
and to search its ofnode for the 'fixed-link' property. But we don't
have an udevice to present for the CPU port.

Since 99% of DSA setups are MAC-to-MAC connections between the switch
and the host Ethernet controller, the struct phy_device is going to be a
fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY
does not need an MDIO bus, and does not need an attached dev either.
Basically, the phy_connect call doesn't do any connection, it just
creates the fixed PHY.

The proposal of this patch is to introduce a new fixed_phy_create
function which will take a single argument: the ofnode that holds this:

	port@4 {
		reg = <4>;
		phy-mode = "internal";

		fixed-link {
			speed = <2500>;
			full-duplex;
		};
	};

and probe a fixed PHY driver using the information from this ofnode.
DSA will probably be the only user of this function.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
2021-02-16 11:48:20 -05:00
Vladimir Oltean
56a5588340 net: phy: fixed: support speeds of 2500 and 10000
Unlike the Linux fixed PHY driver, the one in U-Boot does not attempt to
emulate the clause 22 register set of a gigabit copper PHY driver
through the swphy framework. Therefore, the limitation of being unable
to support speeds higher than gigabit in fixed-link does not apply to
the U-Boot fixed PHY driver. This makes the fixed-link U-Boot
implementation more similar to the one from phylink, which can work with
any valid link speed.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
2021-02-16 11:48:20 -05:00
Igor Opaniuk
592b98bb9a drivers: tee: sandbox: add rpc test ta emulation
This adds support for RPC test trusted application emulation, which
permits to test reverse RPC calls to TEE supplicant. Currently it covers
requests to the I2C bus from TEE.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-02-16 11:48:20 -05:00
Jorge Ramirez-Ortiz
4e96356185 drivers: tee: i2c trampoline driver
This commit gives the secure world access to the I2C bus so it can
communicate with I2C slaves (typically those would be secure elements
like the NXP SE050).

A similar service implementation has been merged in linux:
c05210ab ("drivers: optee: allow op-tee to access devices on the i2c
bus")

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-02-16 11:48:20 -05:00
Simon Glass
c5819701a3 image: Adjust the workings of fit_check_format()
At present this function does not accept a size for the FIT. This means
that it must be read from the FIT itself, introducing potential security
risk. Update the function to include a size parameter, which can be
invalid, in which case fit_check_format() calculates it.

For now no callers pass the size, but this can be updated later.

Also adjust the return value to an error code so that all the different
types of problems can be distinguished by the user.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 22:31:52 -05:00
Tom Rini
2ae80437fb Merge branch '2021-02-02-drop-asm_global_data-when-unused'
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15 10:16:45 -05:00
Tom Rini
f0debb2136 sh: Remove sh7757lcr board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

As this is the last SH4A board, remove that support as well.

Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:24 -05:00
Tom Rini
215386e48c sh: Remove r7780mp board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Patch-cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Patch-cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:23 -05:00
Tom Rini
2ce7b65d6d arm: Remove ls2080a_simu board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-15 10:11:38 -05:00
Tom Rini
a1361f4581 arm: Remove mx35pdk board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2021-02-15 10:11:38 -05:00
Tom Rini
7c82e12cc4 First set of u-boot-atmel fixes for 2021.04 cycle
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Merge tag 'u-boot-atmel-fixes-2021.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2021.04 cycle:

This small PR includes just two fixes but very important: one revert in
the clk subsystem which fixes the boot on many old boards
(sama5d2_xplained, sama5d4_xplained), which currently crash at boot; and
one small fix related to debug serial on sama7g5ek board.
2021-02-12 09:09:10 -05:00
Eugen Hristev
65bde1c087 clk: at91: compat: partially revert "dm: Remove uses of device_bind_offset()"
Revert changes in at91 compat.c that cause u-boot to fail booting on
sama5d4_xplained and sama5d2_xplained

Log below:

<debug_uart>
No serial driver found
Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Could not initialize timer (err -19)

Fixes: a2703ce10c ("dm: Remove uses of device_bind_offset()")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-11 09:26:40 +02:00
Patrick Delaunay
db8fb2ffc4 usb: dwc2: change compatible st,stm32mp1-hsotg to st,stm32mp15-hsotg
The Linux kernel v5.7-rc1 introduced the compatible "st,stm32mp15-hsotg".

See Linux kernel commit d49850110434 ("dt-bindings: usb: dwc2: add
support for STM32MP15 SoCs USB OTG HS and FS")

This patch updates the supported compatible in DWC2 driver,
removes the add-on done in U-Boot dtsi and keeps the compatible
defined in SOC dtsi arch/arm/dts/stm32mp151.dtsi:

usbotg_hs: usb-otg@49000000 {
	compatible = "st,stm32mp15-hsotg", "snps,dwc2";
	reg = <0x49000000 0x10000>;
...
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-10 22:23:35 +01:00
Stefan Roese
cec804251d usb: xhci: Fix compare to use physical addresses in xhci_bulk_tx()
Testing with v2021.01 on MIPS Octeon has shown, that the latest patch
for the "short packet event trb handling" did introduce a bug on
platforms with virtual address != physical address. This patch fixes
this issue by using the correct address types in the compare (both
physical in this case).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
2021-02-10 22:23:24 +01:00
Pali Rohár
5a5024fee0 usb: xhci-pci: Check for errors from dm_pci_map_bar()
Function dm_pci_map_bar() may fail and returns NULL. Check this to prevent
dereferencing a NULL pointer.

In xhci-pci this may happen when board does not enable CONFIG_PCI_PNP and
PCI_BASE_ADDRESS_0 contains unconfigured zero address.

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-02-10 22:23:24 +01:00
Chunfeng Yun
04232f78b3 usb: xhci-mtk: support option to disable ports
Add support to disable specific ports, it's useful for some
scenarios:
1. usb3 PHY is shared whith PCIe or SATA, the corresponding
   usb3 port can be disabled;
2. some usb2 or usb3 ports are not used on special platforms,
   they should be disabled to save power.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-02-10 22:23:24 +01:00
Tom Rini
c7182c02ce - Add configuration helpers for MIPI D-PHY
- generic-phy: add configure op
 - Add Amlogic AXG MIPI D-PHY driver & MIPI PCIe Analog PHY driver
 - odroid: add runtime detection of the N2/N2+/C4/HC4 variants
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Merge tag 'u-boot-amlogic-20210210' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Add configuration helpers for MIPI D-PHY
- generic-phy: add configure op
- Add Amlogic AXG MIPI D-PHY driver & MIPI PCIe Analog PHY driver
- odroid: add runtime detection of the N2/N2+/C4/HC4 variants
2021-02-10 07:56:57 -05:00
Neil Armstrong
4547551aa0 phy: Add Amlogic AXG MIPI PCIe Analog PHY driver
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission
and Analog part of the PCIe lines.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
7ef19503ba phy: Add Amlogic AXG MIPI D-PHY driver
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI
panels.

This D-PHY depends on a separate analog PHY.

Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
f8da8a82c5 generic-phy: add configure op
Add the PHY configure op callback to the generic PHY uclass to permit
configuring the PHY.

It's useful for MIPI DSI PHYs to setup the link timings.

Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Neil Armstrong
afef20585a phy: dphy: Add configuration helpers
The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.

These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10 10:00:51 +01:00
Patrick Delaunay
789d764b9e clk: stm32mp1: add support of I2C6_K
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR =
I2C6EN: I2C6 peripheral clocks enable.

This patch allows customer to use I2C6 in SPL or in U-Boot
as other I2C instance, already support in clk driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09 10:34:27 +01:00
Patrick Delaunay
4363aac051 pinctrl: stm32: bind only the enabled GPIO subnode
Bind only the enabled GPIO subnode, to avoid to probe the node
"gpio-controller" present in SOC dtsi (disabled by default) but
not enabled in the included pincontrol dtsi file.

For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent:
 gpioj: gpio@5000b000
 gpiok: gpio@5000c000

Then these GPIO are absent in output of command "dm tree" and
"gpio status -a"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09 10:31:04 +01:00
Patrick Delaunay
1da426919d pinctrl: stm32: correct management pin display of OTYPE
OTYPE can be used for output or for alternate function to select
PP = push-pull or OP = open-drain mode, according reference manual
(Table 81. Port bit configuration table).

This patch removes this indication for input pins and adds it
for AF and output pins for pinmux command output.

Fixes: b305dbc08b ("pinctrl: stm32: display bias information for all pins")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09 10:31:04 +01:00
Patrice Chotard
ca5cc312d4 pinctrl: stmfx: Use PINNAME_SIZE for pin's name size
Instead of redefining a pin's name size, use PINNAME_SIZE defined
in include/dm/pinctrl.h

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09 10:26:01 +01:00