Commit graph

16 commits

Author SHA1 Message Date
Masahiro Yamada
4431684910 ARM: UniPhier: refactor pinmon command
The return value of get_boot_mode_sel() is used as the index of
the boot_device_table[] array.  Its type should be "int" rather
than "u32".

Use only the iterator "i" for the loop in do_pinmon().

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-02-07 00:15:03 +09:00
Masahiro Yamada
5848899a1f ARM: UniPhier: remove dummy gpio.h
This dummy header was introduced by commit 630bf80ebb (ARM:
UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL).

Thanks to commit a08d643dbd (dm: Drop gpio.h header from
fdtdec.c), such an ugly workaround is no longer needed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-02-07 00:10:34 +09:00
Masahiro Yamada
0ba924a4ec ARM: UniPhier: add SG_MEMCONF macros for DDR channel 2
PH1-sLD3, PH1-LD6b have DDR channel 2.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:52:16 +09:00
Masahiro Yamada
367a0d51db ARM: UniPhier: rename SG_MEMCONF_* macros for readability
Match the suffixes of SG_MEMCONF_* macros with SZ_* macros defined
by <linux/sizes.h> for readability.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:52:14 +09:00
Masahiro Yamada
4a35d60718 ARM: UniPhier: use <linux/sizes.h> for readability
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:52:06 +09:00
Masahiro Yamada
d6bc30af52 ARM: UniPhier: remove __packed that causes a problem on GCC 4.9
The DDR PHY training function, ddrphy_prepare_training() would not
work if compiled with GCC 4.9.

The struct ddrphy (arch/arm/include/asm/arch-uniphier/ddrphy-regs.h)
is specified with __packed because it represents a hardware register
mapping, but it turned out to cause a problem on GCC 4.9.

If -mno-unaligned-access is specified (yes, it is in
arch/arm/cpu/armv7/config.mk), GCC 4.9 is aware of the
__attribute__((packed)) and generates extra instructions to perform
the memory access in a way that does not cause unaligned access.
(Actually it is not need here because the register base, the first
argument of the ddrphy_prepare_training(), is always given with a
4-byte aligned address.)

Anyway, as a result, readl() / writel() is divided into byte-wise
accesses.  The problem is that this hardware only accepts 4-byte
register access.  Byte-wise accesses lead to unexpected behavior.

There are some options to avoid this problem.

[1] Remove -mno-unaligned-access
[2] Add __aligned(4) along with __packed to struct ddrphy
[3] Remove __packed from struct ddrphy

[1] solves the problem for ARMv7, but it does not for pre-ARMv6 and
ARMv6-M architectures where -mno-unaligned-access is default.
So, [1] does not seem reasonable in terms of code portability.

Both [2] and [3] work well, but [2] seems too much.  All the members
of struct ddrphy have the u32 type.  No padding would be inserted
even if __packed is dropped.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
2015-01-23 00:44:17 +09:00
Masahiro Yamada
b4ad44baab ARM: UniPhier: add UART initialization routine for low-level debug
The low-level debugging functions are useful to debug the early boot
stage where the full UART driver is not available.

UniPhier SoCs need to initialize the UART port 0 to use this feature.
The initialization routine is called at the very entry of the
lowlevel_init().

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-08 23:01:56 +09:00
Masahiro Yamada
2661dfd004 ARM: UniPhier: enable output of system bus
For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs,
the output of the system bus is disabled by default.
It must be enabled by software to have access to the system bus.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-08 23:01:45 +09:00
Masahiro Yamada
b614e16cc0 ARM: UniPhier: add DDR PHY training code
This training code provides run-time adjustment of DDR PHY parameters
for stable DDR operation.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-30 17:45:25 +09:00
Masahiro Yamada
7a3620b246 ARM: UniPhier: detect the number of flash banks at run-time
Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to.  So, run-time
detection of the number of flash banks would be more user-friendly.

Until this commit, UniPhier boards have achieved this by (ab)using
board_flash_wp_on() because the boot failed if flash_size got zero.
Fortunately, this problem was solved by commit 70879a9256 (flash:
do not fail even if flash_size is zero).

Now it is possible to throw away such a tricky workaround.  This
commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further
refactoring.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-09 00:08:33 +09:00
Masahiro Yamada
630bf80ebb ARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL
If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>.  Consequently, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they do not
support GPIO.

In the first place, GPIO has nothing to do with OF_CONTROL.
It is wrong that lib/fdtdec.c includes GPIO functions; it should
be split into two files, FDT-common things and GPIO things.
It is, however, a pretty big work to fix that correctly.

This is a compromised commit to add a dummy <asm/arch/gpio.h>
to support OF_CONTROL for UniPhier platform.  This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2014-11-28 02:17:21 +09:00
Masahiro Yamada
2d5d1c9e29 ARM: UniPhier: add set_pinsel macro for use in assembly code
The function sg_set_pinsel is useful for switching I/O pins
but it can be only used in C code.  This commit adds a simple
macro that is available in asm code.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-12 00:22:23 +09:00
Masahiro Yamada
048899ba8c usb: UniPhier: add UniPhier on-chip EHCI host driver support
Support EHCI host driver used on Panasonic UniPhier platform.
Since Device Tree is not supported on UniPhier yet, the base address
of USB cores are passed from board files (platdevice.c).

TODO for me:
Move the base address to device trees.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-11-12 00:21:28 +09:00
Masahiro Yamada
113ef59e45 ARM: UniPhier: add MIO register file
This commit adds register defines of MIO (Media I/O) block
of UniPhier platform.  This file is necessary to control
the reset signals of the USB cores.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-12 00:21:28 +09:00
Masahiro Yamada
d064cbffff dm: serial: use Driver Model for UniPhier serial driver
This commit converts UniPhier on-chip serial driver to driver model.

Since UniPhier SoCs do not have Device Tree support, some board files
should be added under arch/arm/cpu/armv7/uniphier/ph1-*/ directories.
(Device Tree support for UniPhier platform is still under way.)

Now the base address and master clock frequency are passed from
platform data, so CONFIG_SYS_UNIPHIER_SERIAL_BASE* and
CONFIG_SYS_UNIPHIER_UART_CLK should be removed.

Tested on UniPhier PH1-LD4 ref board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-23 21:43:09 -06:00
Masahiro Yamada
5894ca007d ARM: UniPhier: add UniPhier SoC support code
These are used by Panasonic UniPhier SoC family.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-10-05 14:10:09 +09:00