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5 commits

Author SHA1 Message Date
Tom Rini
42fb448a20 configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2024-01-03 09:26:16 -05:00
Fabio Estevam
595b8be3af imx8qm_dmsse20a1: Improve SPL memory configuration 
Currently, building imx8qm_dmsse20a1_defconfig leads to the following
warning:

aarch64-linux-ld.bfd: invalid origin for memory region .sdram

Fix it by using the same SPL memory layout as done in the imx8mq_evk.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
 2023-12-13 09:18:01 -03:00
Tom Rini
ec6f06bddc configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2023-10-02 13:58:20 -04:00
Tom Rini
56a3a499f4 configs: Resync with savedefconfig 
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
 2023-05-08 13:43:35 -04:00
Oliver Graute
3bc6257e80 imx: support i.MX8QM DMSSE20 a1 board 
Add i.MX8QM DMSSE20 a1 board support

U-Boot 2023.04-00030-g7be2f547b2 (Apr 21 2023 - 11:11:43 +0200)

Model: Advantech iMX8QM DMSSE20
Board: DMS-SE20A1 8GB
Build: SCFW 549b1e18, SECO-FW c9de51c0, ATF 5782363
Boot:  USB
DRAM:  8 GiB
Core:  100 devices, 19 uclasses, devicetree: separate
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:   eth0: ethernet@5b040000
Warning: ethernet@5b050000 (eth1) using random MAC address - 32:05:0c:f9:5e:10
, eth1: ethernet@5b050000
Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
 2023-05-02 10:57:32 +02:00