Commit graph

47444 commits

Author SHA1 Message Date
Tuomas Tynkkynen
c88ecf47bd ata: Migrate CONFIG_SATA_SIL to Kconfig
Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12 14:05:48 -05:00
Tuomas Tynkkynen
ac2e33efda ata: Drop CONFIG_MX51_PATA
The last user of this driver went away in August 2015 in commit:
b6073fd211 ("arm: Remove mx51_efikamx, mx51_efikasb boards")

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12 14:05:48 -05:00
Tuomas Tynkkynen
0d26b831d7 ata: Drop CONFIG_SATA_DWC
The last user of this driver went away in June 2017, in commit:
98f705c9ce ("powerpc: remove 4xx support")

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12 14:05:35 -05:00
Tom Rini
e3143ecb8a Merge git://git.denx.de/u-boot-arc 2017-12-12 10:57:58 -05:00
Alexey Brodkin
d5fbcd57ed gpio/hsdk: Depend on DM_GPIO instead of simple DM
This driver really is DM GPIO one and so we need to have a correct
dependency, because DM alone doesn't provide required for CMD_GPIO
call and we're seeing build failures like this:
---------------------->8---------------------
cmd/built-in.o: In function 'do_gpio':
.../cmd/gpio.c:188: undefined reference to 'gpio_request'
...
---------------------->8---------------------

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-12-12 18:47:30 +03:00
Tom Rini
87f3dee22b Merge git://git.denx.de/u-boot-uniphier 2017-12-11 17:06:04 -05:00
Tom Rini
6f1ee8a4bf Merge git://git.denx.de/u-boot-arc 2017-12-11 17:05:43 -05:00
Masahiro Yamada
7f8e75390b ARM: uniphier: use FIELD_PREP for PLL settings
It is tedious to define both mask and bit-shift.  <linux/bitfield.h>
provides a convenient way to get access to register fields with a
single shifted mask.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:12 +09:00
Masahiro Yamada
f2ce50b2d0 ARM: uniphier: compute SSCPLL values more precisely
Use DIV_ROUND_CLOSEST().  To make the JK value even more precise,
I used a bigger coefficient, then divide it by 512.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:11 +09:00
Dai Okamura
c30c44e799 ARM: uniphier: fix SSCPLL init code for LD11 SoC
Commit 682e09ff9f ("ARM: uniphier: add PLL init code for LD20 SoC")
missed to write the computed value to the SSCPLLCTRL2 register.

Fixes: 682e09ff9f ("ARM: uniphier: add PLL init code for LD20 SoC")
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:11 +09:00
Masahiro Yamada
dc774e69bb mtd: nand: denali: make NAND_DENALI unconfigurable option
denali.c has no driver entry in itself.  It makes sense only when
compiled together with denali_dt.c

Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from
the Kconfig menu.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:36:11 +09:00
Masahiro Yamada
00ed0e3ee3 ARM: uniphier: compile pll-base-ld20.c for PXs3
Fix the link error for the combination of
  CONFIG_ARCH_UNIPHIER_LD11=n
  CONFIG_ARCH_UNIPHIER_LD20=n
  CONFIG_ARCH_UNIPHIER_PXS3=y

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12 00:35:59 +09:00
Eugeniy Paltsev
e80dac0ab8 ARC: clk: introduce HSDK CGU clock driver
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.

Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:23 +03:00
Eugeniy Paltsev
3cf239394a ARC: cache: explicitly initialize "*_exists" variables
dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.

This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");

if (/* condition */)
		ioc_exists = 1;
-------------------------->>---------------------

That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.

Also while at it we change their type to "bool" as more appropriate.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
64f4742631 ARC: add defines of some cache and xCCM AUX registers
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
e59c379720 ARC: add macro to get CPU id
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.

I.e. with help of this macro each core may get its index in SMP system.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
4e782b5940 ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz
DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).

So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
fc86faf9d6 ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO
With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
 #include <asm/gpio.h>
                      ^
-------------------------->8---------------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-10 21:13:05 +03:00
Tom Rini
335f7b1290 Merge git://git.denx.de/u-boot-mpc85xx 2017-12-08 12:02:01 -05:00
Tom Rini
48f0e6bb37 Merge git://git.denx.de/u-boot-rockchip 2017-12-08 09:32:10 -05:00
Jakob Unterwurzacher
b32b1bd10b rockchip: rk3399-puma: preserve leading zeros in serial#
Linux preserves leading zeros in /proc/cpuinfo, so we
should as well.

Otherwise we have the situation that
/sys/firmware/devicetree/base/serial-number
and /proc/cpuinfo disagree in Linux.

Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-08 11:49:39 +01:00
Tom Rini
6c7010b779 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-12-07 17:56:51 -05:00
York Sun
e421b646fc armv8: fix gd after relocation
Commit 21f4486faa ("armv8: update gd after relocate") sets x18
without checking the return value of spl_relocate_stack_gd().

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Kever Yang <kever.yang@rock-chips.com>
CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-07 17:00:06 -05:00
Simon Glass
1d0f30a8e0 log: Add documentation
Add documentation for the log system.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
20faa27c2b log: test: Add a pytest for logging
Add a test which tries out various filters and options to make sure that
logging works as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
e189a0bda8 log: sandbox: Enable logging
Enable all logging features on sandbox so that the tests can be run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
af1bc0cf46 log: Plumb logging into the init sequence
Set up logging both before and after relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
ef11ed8239 log: Add a test command
Add a command which exercises the logging system.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
d5f61f272d log: Add a 'log level' command
Add a command for adjusting the log level.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
c6d47535df log: Add a console driver
It is useful to display log messages on the console. Add a simple driver
to handle this.

Note that this driver outputs to the console, which may be serial or
video. It does not specifically select serial output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
e9c8d49d54 log: Add an implementation of logging
Add the logging header file and implementation with some configuration
options to control it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
c5404b64fb Drop the log buffer
This does not appear to be used by any boards. Before introducing a new
log system, remove this old one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
0ad0458c76 usb: Correct use of debug()
With clang this gives a warning because hubsts appears to be used before
it is set, even if ultimately it is not used. Simplify the code to avoid
this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
95b41b80d7 mtdparts: Correct use of debug()
The debug() macro now evaluates its expression so does not need #ifdef
protection. In fact the current code causes a warning with the new log
implementation. Adjust the code to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
0e98b0a650 Move debug and logging support to a separate header
Before adding new features, move these definitions to a separate header
to avoid further cluttering common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07 15:17:00 -05:00
Simon Glass
64e9b4f346 Revert "sandbox: Drop special case console code for sandbox"
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.

For ease of debugging it seems better to revert this change also.

This reverts commit d8c6fb8ced.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
e341434a7f sandbox: Adjust pre-console address to avoid conflict
We cannot use sandbox memory at 0 since other things use memory at that
address. Move it up out of the way.

Note that the pre-console buffer is currently disabled with sandbox, but
this change will avoid confusion if it is manually enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Simon Glass
0b189b6ce1 Revert "sandbox: remove os_putc() and os_puts()"
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.

For ease of debugging it seems better to revert this change.

This reverts commit 47b98ad0f6.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07 15:17:00 -05:00
Tom Rini
bd1e3bcc0b Merge git://git.denx.de/u-boot-i2c 2017-12-07 07:28:20 -05:00
Nobuhiro Iwamatsu
28df8ed07f cmd: i2c: Fix use sdram sub command with CONFIG_DM_I2C
sdram sub command of i2c command does not support Drivers Model.
This adds Drivers Model support to sdram sub command.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:29:35 +01:00
Alan Ott
cab8a27d80 i2c: at91_i2c: remove the .probe_chip function
The .probe_chip function is supposed to probe an i2c device on the bus to
determine whether a device is answering to a particular address.
at91_i2c_probe_chip() did not do anything resembling this and always
returned 0.

It looks as though at91_i2c_probe_chip() was intended to be a .probe
function for the controller, as it was copied-and-pasted to become
at91_i2c_probe() in 0bc8f640a4.

Removing the at91_i2c_probe_chip() function makes the higher layer
(i2c_probe_chip()) try a zero-length read transfer to test for the
presence of a device instead, which does work.

Signed-off-by: Alan Ott <alan@softiron.com>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:29:19 +01:00
Alan Ott
0afbb0e1c0 i2c: at91_i2c: Wait for TXRDY after sending the first byte
The driver must wait for TXRDY after each byte is pushed into
the i2c FIFO before pushing the next byte. Previously this was
not done for the first byte, causing a race condition with zeros
sometimes being sent for the next byte (which is typically the
first actual data byte).

Signed-off-by: Alan Ott <alan@softiron.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:28:58 +01:00
Beniamino Galvani
50a69095cb i2c: meson: add some comments
Add some comment describing the purpose of struct members and
functions.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:28:42 +01:00
Beniamino Galvani
989bb924c4 i2c: meson: fix return codes on error
Change meson_i2c_xfer_msg() to return -EREMOTEIO in case of NACK, as
done by other drivers. Also, don't change the return error in
meson_i2c_xfer().

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:28:31 +01:00
Beniamino Galvani
8c47ab6b3b i2c: meson: reduce timeout
The datasheet doesn't specify a suggested timeout and 500ms seems very
long: reduce it to 100ms.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:28:21 +01:00
Beniamino Galvani
4ecbb8b678 i2c: meson: improve Kconfig description
Expand the Kconfig description with hardware features.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-12-07 09:28:06 +01:00
Ashish Kumar
d798a6ee64 armv8: ls1088a: Add nand support for ls1088ardb
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06 14:56:31 -08:00
Yogesh Gaur
73fa206aef driver: fsl-mc: MC object cleanup when DPL not loaded
For case when MC is loaded but DPL is not deployed perform MC
object [DPBP, DPIO, DPNI and DPRC] cleanup.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06 14:56:31 -08:00
Vinitha Pillai-B57223
9b457cc6d1 SECURE BOOT: Add fall back option
Add fall back option, to boot from NOR/QSPI/SD for LS1043, LS1046,
LS1021 in case of distro boot failure.

For LS1046, add kernel validation in case of secure boot in sd_bootcmd
and qspi_bootcmd. For LS1043 and LS1021, add kernel validation in case
of secure boot in sd_bootcmd, qspi_bootcmdand  nor_bootcmd.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06 14:55:17 -08:00
Udit Agarwal
003c99de10 armv8: LS2080A_SECURE_BOOT: Enable CONFIG_FSL_LS_PPA.
Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in
LS2080AQDS and LS2080ARDB secure boot defconfig.

Removes CONFIG_FIT, as with CONFIG_FSL_LS_PPA enabled,
CONFIG_FIT is selected.

Removes CONFIG_SPL_RSA as in NOR boot SPL boot is not done.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06 14:55:17 -08:00