Commit graph

482 commits

Author SHA1 Message Date
Simon Goldschmidt
1b898ffc04 gpio: dwapb_gpio: convert to livetree
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree
functions (inspired from mt7621_gpio.c).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-10 22:48:11 +02:00
Marek Vasut
86b8e7d61a gpio: renesas: Add RZ/A1 R7S72100 GPIO driver
Add GPIO driver for RZ/A1 SoC. The IP is very different from the
R-Car Gen2/Gen3 one already present in the tree, hence a custom
driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Tom Rini
44237e272f Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various pinctrl / gpio fixes for R-Car
2019-05-06 07:19:31 -04:00
Tom Rini
86f578ee85 - mscc: small fixes, enhance network support for Serval, Luton amd
Ocelot
 - mt7620: rename arch to more generic name mtmips
 - mips: pass initrd addresses via DT as physical addresses
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAlzMa60ACgkQKPlOlyTy
 XBg3FBAAl5I1zNoyEQBuSpe+++0fNFkug0vV985keJA3iXdskdxE8vpxPv6wAp+w
 IjBX+e04LY7i5iW58E//f/JBjzL1H345nPeuRsflmlDARep1pqgkEAsEUglGiQW+
 ZNDq/aoImWhiiX2nQHnU4ykHNyvIhUOTjldrwU5DfIS2N+8M23pjLhODMsgaNmkd
 WfwYB91oTXRnnecwG8Nd1MJU/Jpcns5y6eYwok8vQwkCyzcfsIEP052m3r2SAUMz
 3hIlz9WKAHc+pYLz2BWbn560KPJHyS0UqfemiT/M0JasIkojJcQwtrWTKj7g7ZOq
 z8XJQ1Ny0xOYQbfbUcvQttBwVXzYQTKy0jS6qi4vB9Q0TgpRP+v//n29IAJA0YkS
 BE3Nq96cCMgKarSFkMFaXifv9flnb/wZRymB42Frb9fqiwM2wX10zhcn7zW8gUYc
 0Mocl+zkUrmtmA3gSspMJr6kkfX629l97RK7wiY0PkTa4OKSqqMR5JxlVQ+vK72N
 f/yxWYxTH/90wfVolTHt52J/hNydEapVFuudL8ffnuLo84BWzOHP3bwQwtB927zV
 g4nHxotTmVErz5Pr2JrwaZEFVI+Sc+wXPz68Z7hzZxeiO5tBAELhvtDKAsf9e1gt
 OFgQwA5cTRWWxLmWxyWY3nEbXVqAIOsdWIDepAUqrIXAI5rmFt8=
 =SZ/W
 -----END PGP SIGNATURE-----

Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips

- mscc: small fixes, enhance network support for Serval, Luton and Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
2019-05-04 20:02:42 -04:00
Marek Vasut
fbf26bea39 gpio: renesas: Migrate to pinctrl GPIO accessors
Switch to generic pin controller API for configuring pins as GPIOs
instead of using the ad-hoc call into the R-Car PFC driver. Moreover,
add .free() implementation for the GPIO controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
2019-05-04 19:26:49 +02:00
Weijie Gao
16b94903e2 mips: rename mach-mt7620 to mach-mtmips
Currently mach-mt7620 contains only support for mt7628. To avoid confusion,
rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms.
MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628
because they do not share the same lowlevel codes.

Dependencies of four drivers are changed to SOC_MT7628 as these drivers
are only used by MT7628.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-05-03 16:43:11 +02:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Philippe Reynes
353496b756 gpio: bcm6345: allow this driver on ARCH_BCM63158
This IP is also used on some arm SoC, so we allow
to use this driver on arch bcm63158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
14c9bd46e5 gpio: bcm6345: allow this driver on ARCH_BCM6858
This IP is also used on some arm SoC, so we allow
to use this driver on arch bcm6858.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
ea0d6aa213 gpio: bcm6345: switch to raw I/O functions
This driver is used on several big endian mips board.
So we could use raw I/O function instead of forcing
big endian access.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:51 +02:00
Julien Béraud
97b262758b gpio: altera_pio: fix get_value
gpio_get_value should return 0 or 1, not the value of bit & (1 << pin)

Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Julien Beraud <julien.beraud@orolia.com>
2019-02-25 16:07:36 +01:00
Simon Glass
aa48c94ca8 rockchip: Implement spl_gpio in the GPIO driver
Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Peng Fan
1610368234 gpio: introduce CONFIG_SPL_DM_PCA953X
Introduce CONFIG_SPL_DM_PCA953X for SPL usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28 20:35:47 +01:00
Lars Povlsen
ace9c103df mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.c
With the new mscc_bb_spi.c driver, there is no longer use for the
gpio-mscc-bitbang-spi.c driver.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Lars Povlsen
be8313feee mips: mscc_sgpio: Add the MSCC serial GPIO device (SIO)
This add support for the the MSCC serial GPIO driver in MSCC
VCoreIII-based SOCs.

By using a serial interface, the SIO controller significantly extends
the number of available GPIOs with a minimum number of additional pins
on the device. The primary purpose of the SIO controller is to connect
control signals from SFP modules and to act as an LED controller.

This adds the base driver.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-01-16 13:56:43 +01:00
Patrice Chotard
4fb224638d gpio: stm32f7: Fix SPL code size
In order to keep SPL code size below the 32Kb limit,
put under CONFIG_SPL_BUILD flag all unused code in SPL.
This is needed for stm32f7xx board which are using SPL.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-01-09 07:13:33 -05:00
Patrice Chotard
39a8f0be2d gpio: stm32f7: Fix gpio bank hole management
In case "gpio-ranges" property is not present in device tree,
use default value for gpio_count and gpio_range.
This fixes an issue on stm32 F7 and H7 boards where "pinmux status -a"
command didn't return any pin status due to the fact that both stm32 F7
and H7 board DT doesn't use the gpio-ranges property.

Fixes: dbf928dd2634a6("gpio: stm32f7: Add gpio bank holes management")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-01-09 07:13:32 -05:00
Tom Rini
522e035441 imx for 2019.01
- introduce support for i.MX8M
 - fix size limit for Vhybrid / pico boards
 - several board fixes
 - w1 driver for MX2x / MX5x
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlwrbc8PHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3oCwL/RCqesqQaLKkUQDiYQJzoa6Ia7TeSTD1HoHl
 lYXarE9FloD7lHp4Lz1elU8Y+yTtjvixKS9UJGRc0pMcJJ/CEavjK+oBOVNbEnvH
 vm/oXQfZqj60tLc2Z7RfRe1gHHCcaGiBXJePea5WhP89cUZW1YBs4TVY2AIEQeRV
 V8vcxbBprqqBWyFRgH+ORsWrmkfcYEfiMr97Y8v07RRPX/C80e98PTc16fh9o7S1
 +i8Pcs0SIMnA8PqXVgrpa4DT7OS/ZtLADG/ODpvJ25nHoKvdhlXMc8o8L5dyaO1f
 66UD0A8D3PXkXkFodZujSjtKl5ygeA/4YkEnY6PRqd2W6kZsq6R7XCu/3e3eQSwK
 GFnWQnzLkDOCKMZlxR8l3sJdhY3Ee3oAQ+EX3PEy1MvKKrGA8PSOIKHq3tVNrPYB
 tBnJP32G+2Ya0SG169ROoUMZQQXfTt+9kdqsxx5xL2Pfpt9d+YinCM8uQdhqBGPa
 COqegLaD0ZkADsodZp876u3Irbo6bw==
 =mEcH
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
2019-01-01 10:01:00 -05:00
Peng Fan
cd357ad112 imx: rename mx8m,MX8M to imx8m,IMX8M
Rename mx8m,MX8M to imx8m,IMX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01 14:12:18 +01:00
Gregory CLEMENT
02aea4da1d gpio: mscc-bitbang-spi: Add a simple gpio driver for bitbgang spi
The VCore III SoCs such as the Luton but also the Ocelot can remap an SPI
flash directly in memory. However, for writing in the flash the
communication has to be done by software.

Each of the signal used for the SPI are exposed in a single register. In
order to be able to use the soft-spi driver, the management of this pin
is done through this simple gpio driver.

Even if the main purpose of this driver is to be used by soft-spi, it can
still be used as a normal gpio driver but with limitation: for example
the first pin can't be used as output.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Patrice Chotard
8b6d45ab64 gpio: stm32f7: Remove CONFIG_CLK flag.
As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:48 -05:00
Patrice Chotard
b2f84e37e2 gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
To allow access to this define by other driver, move
it into gpio.h

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Patrice Chotard
dbf928dd26 gpio: stm32f7: Add gpio bank holes management
In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.

For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Simon Goldschmidt
89f1fe5bd4 gpio: dwapb_gpio: fix binding without bank-name property
As a preparation for merging the socfpga gen5 devicetree files
from Linux, this patch makes the dwapb gpio driver work correctly
without the 'bank-name' property on the gpio-controller nodes.

This property is not present in the Linux drivers and thus is not
present in the Linux devicetrees. It is only used to access pins
via bank name.

This fallback is necessary since without it, the driver will
return an error code which will lead to an error in U-Boot
startup.

The bank names will still be added to the default board device
trees in follow-up patch, but other boards using this driver and
not including the bank name should also work with the socfpga.dtsi
without adding the bank-name property.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-11-29 12:45:15 +01:00
Stefan Roese
4751e5595e gpio: Add MT7621 GPIO support
This patch adds GPIO support for the Mediatek MT7621 SoC, tested on
MT7688 (Gardena smart-gateway). The driver is loosly based on the
Linux kernel version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned']
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18 16:02:22 +01:00
Patrice Chotard
cad732499b gpio: stm32f7: Add ops get_function
This patch adds gpio get_function ops support.
This function reports the state of a gpio.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-16 16:51:56 -05:00
Ye Li
3764b2bdce gpio: pca953x: Clear the polarity invert register at init
The pca953x_gpio driver uses default value of polarity inversion
register. For some devices like PCA9557 and MAX7310, their polarity
inversion register default value is 0xf0. So for high 4 ports, when
reading their values, the values are inverted as the actual level.

This patch clears the polarity inversion register to 0 at init, so
that the port read and write values are aligned.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-11-16 13:34:36 -05:00
Bin Meng
695c4994ac gpio: Remove DM_FLAG_PRE_RELOC flag in various drivers
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be
bound before relocation. However due to a bug in the DM core,
the flag only takes effect when devices are statically declared
via U_BOOT_DEVICE(). This bug has been fixed recently by commit
"dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in
lists_bind_fdt()", but with the fix, it has a side effect that
all existing drivers that declared DM_FLAG_PRE_RELOC flag will
be bound before relocation now. This may expose potential boot
failure on some boards due to insufficient memory during the
pre-relocation stage.

To mitigate this potential impact, the following changes are
implemented:

- Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver
  only supports configuration from device tree (OF_CONTROL)
- Keep DM_FLAG_PRE_RELOC flag in the driver only if the device
  is statically declared via U_BOOT_DEVICE()
- Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for
  drivers that support both statically declared devices and
  configuration from device tree

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-14 09:16:28 -08:00
Anatolij Gustschin
745915aa59 gpio: pca953x_gpio: fix DT GPIO flags translation
Commit fb01e07a95 accidentally broke initialisation of GPIO
descriptor flags from device tree: currently the active low
flag from gpio-specifier is always ignored. Fix it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
2018-11-14 10:59:23 -05:00
Tom Rini
cf033e04da Merged imx8 architecture, fix build for imx8 + warnings
-----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlvRk0gPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3IuAL/0jfCqEIzKbPXIz81zJ+43ZNPsyu4LluUFsP
 2s5+yKN4zPnxDaHmVyxKynREqCNCcbfz7biStEPRzIjQYPBWUWrqz1yceqvOTqWQ
 eh51ItNeow28IlnVEr40e5cNL28KPsAdO8Tx6yNiXdPndPOgm3DuFlT+Xbnv2/+P
 X9GYBoCD7EQ3aUJBDUKcN/AFSAl8YCQ43FKhowM18/ExeURiKk8YDRXVFgTDDd4J
 HIlzUbyeIG24xfmxc0MsUMEufMjqQE7k/tMfFvQJiwLBLkzuO+1WmbPlWd7XHqco
 t68mheBcm8m2G/CZJoxCy8ymUi5PKDJBhw3qQz646h+JiXP1lg7Yw8hf4nREV56k
 v/bMiDU1exIflI9Qf8CibxRAYv3bjKJD6p/uua2CIvsLO4emLPbi7DHFBdaQq+WB
 r32O0Xc6LiRBIhr/qeL/5HmxFT2o4lo+O9ybo10uhK8RA1LTPlQ0UNMwmSPLl4zR
 7e5YwnRCcHV492+/Fn31LWXUUVVxVw==
 =kkpS
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings
2018-10-25 10:16:21 -04:00
Peng Fan
8b2a31f133 gpio: mxc_gpio: add support for i.MX8
Add i.MX8 support, there are 8 GPIO banks.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 12:59:01 +02:00
Keerthy
0f3cf2b3e5 gpio: da8xx: Push generic defines of gpio.h out of mach-davinci
Push generic defines of gpio.h out of mach-davinci to drivers/gpio
now that non-davinci architectures are beginning to use this IP.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix calimain build]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-10 13:35:03 -04:00
Keerthy
401d74cb2c gpio: da8xx: Add k2g compatible
Add k2g compatible so that k3 SoCs can be supported

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-10-10 13:32:41 -04:00
Ley Foon Tan
86d56a5da5 gpio: dwapb_gpio: Change to use devm_kcalloc()
Change to use managed resource function devm_kcalloc(),
so it will auto free memory when driver is removed.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-10-03 12:56:50 +02:00
Ley Foon Tan
9ea354444d gpio: dwapb_gpio: Change to use dev_read_addr()
This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15 03:17:01 +02:00
Ley Foon Tan
db6a158bc3 gpio: dwapb_gpio: Add reset ctrl to driver
Add code to reset all reset signals as in gpio DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15 03:17:01 +02:00
Ley Foon Tan
71f2700b92 gpio: dwapb_gpio: Enable get_function support
Enabled get_function support for dwapb where the function will
return the state of GPIO port.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-09-15 03:17:01 +02:00
Adam Ford
99571b41c6 DM: omap_gpio: Reduce overhead when used with OF_PLATDATA
Platforms with limited resources in SPL may enable OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 21:38:52 -04:00
Adam Ford
535f46dad9 GPIO: omap_gpio: Fix gpio name names with device tree
The GPIO bank numbers do not appear in the device tree, so this
patch makes the gpio name based on the address
(ie gpio@49054000_31 vs gpio4_31)

adam

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
2018-09-11 21:38:15 -04:00
Adam Ford
9440b3d3d0 dm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGH
With DM and device tree support, let's use the GPIO_ACTIVE_HIGH
and GPIO_ACTIVE_LOW from the device tree as they are intended.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:00 -04:00
Adam Ford
1eddf54931 DM: GPIO: Fix da8xx GPIO indexing over GPIO 32
The GPIO banks are broken up into two 16-bit registers for each
bank set.  Unfortunately, the math that determines how to shift
blindly shifted by the number of the gpio.  This worked for gpio
numbers under 32, but higher gpio's are broken.  This fixes the
gpio index, so the bank is passed and the shift amount within
the register is passed now instead of the gpio number.

Fixes: 8e51c0f25406("dm: gpio: Add DM compatibility to
GPIO driver for Davinci")

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:37:50 -04:00
Patrice Chotard
798cd708d5 gpio: stm32f7: replace ODR update by BSRR write
Replace clrsetbits on ODR register (2 operations: one read + one write)
by writing on the correct bit (SET or RESET) of the BSRR register
(only 1 write operation).

Moreover this register if safe for simultaneous access by 2 master on
the bus.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-10 20:48:18 -04:00
Michal Simek
312dd1c55c gpio: xilinx: Add support for using label property
Add support for reading label property from DT and set up bank name
based on that. If label property is not present full device node name is
used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
ac7f061398 gpio: xilinx: Return 0 from xilinx_gpio_set_value
.set_value functions have no specified return value and gpio_uclass is
not working with it too. But this patch is returning 0 to be in sync
with others DM gpio drivers.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
c714aeaec1 gpio: xilinx: Not read output values via regs
Reading registers for finding out output value is not working because
input value is read instead in case of tristate.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
642a860412 gpio: xilinx: Simplify logic in xilinx_gpio_set_value
There is no reason to do read/write for if/else separately.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
bf2a69de81 gpio: xilinx: Set value before changing direction
Set a value before changing gpio direction. This will ensure that the
old value is not propagated when direction has changed but new value is
not written yet.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:43 +02:00
Michal Simek
6f81ff0422 gpio: xilinx: Remove !DM driver
There is no user for !DM driver that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-07 11:03:43 +02:00
Michal Simek
ddd7b3fa33 gpio: xilinx: Find out bank before use in xilinx_gpio_get_function()
Call xilinx_gpio_get_bank_pin() before use.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07 11:03:42 +02:00
Vipul Kumar
0f07257345 gpio: zynq: Used platdata structure for storing static data instead of priv
This patch used platdata structure instead of priv for storing static
information read from DT.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00