Commit graph

29 commits

Author SHA1 Message Date
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
Wolfgang Denk
f0c0b3a9e6 Fix incorrect use of getenv() before relocation
A large number of boards incorrectly used getenv() in their board init
code running before relocation.  In some cases this caused U-Boot to
hang when certain environment variables grew too long.
Fix the code to use getenv_r().

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: The LEOX team <team@leox.org>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Georg Schardt <schardt@team-ctech.de>
Cc: Werner Pfister <Pfister_Werner@intercontrol.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Peter De Schrijver <p2@mind.be>
Cc: John Zhan <zhanz@sinovee.com>
Cc: Rishi Bhattacharya <rishi@ti.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
2011-05-12 19:48:42 +02:00
Kumar Gala
663570950d powerpc/8xxx: Rework XES boards pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8xxx XES boards and utilize the common
fsl_pcie_init_board().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CC: Peter Tyser <ptyser@xes-inc.com>
2011-01-14 01:32:20 -06:00
Becky Bruce
38dba0c2ff mpc85xx boards: initdram() cleanup/bugfix
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts.  Most
of the initdram() functions were identical, with 2 common differences:

1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others.  I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.

2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document.  It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled.  This seems bad.

The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
5d27e02c04 powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured
Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Peter Tyser
8ca78f2c89 fsl: Clean up printing of PCI boot info
Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup.  This
patch unifies the style to look like:

...
NAND:  1024 MiB
PCIE1: connected as Root Complex
           Scanning PCI bus 01
        04  01  8086  1010  0200  00
        04  01  8086  1010  0200  00
        03  00  10b5  8112  0604  00
        02  01  10b5  8518  0604  00
        02  02  10b5  8518  0604  00
        08  00  1957  0040  0b20  00
        07  00  10b5  8518  0604  00
        09  00  10b5  8112  0604  00
        07  01  10b5  8518  0604  00
        07  02  10b5  8518  0604  00
        06  00  10b5  8518  0604  00
        02  03  10b5  8518  0604  00
        01  00  10b5  8518  0604  00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
           Scanning PCI bus 0d
        0d  00  1957  0040  0b20  00
PCIE2: Bus 0c - 0d
In:    serial
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org
2010-11-14 23:46:42 +01:00
Wolfgang Denk
071bc92330 Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-27 22:48:30 +02:00
John Schmoller
bfe18815e8 XPedite5500 board support
Initial support for Extreme Engineering Solutions XPedite5500 -
a P2020-based PMC/XMC single board computer.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 03:04:41 -05:00
John Schmoller
72fb68d53c xes: Add board_flash_wp_on()
Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.

Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
 ## Unknown FLASH on Bank 2 - Size = 0x00000000 = 0 MB
 *** failed ***
 ### ERROR ### Please RESET the board ###

With this patch, NOR flash initialization is skipped:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: Uninitialized - Write Protect On
 L2:    1024 KB enabled
 NAND:  1024 MiB
 ...

Note that flash related commands such as flinfo and saveenv will error
out when flash write protection is enabled.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:19 -05:00
John Schmoller
92af6549b8 xes: Consolidate checkboard()
Create a common checkboard() function to support all X-ES's Freescale
boards.

Also, add a get_board_derivative() function which reads hardware
strapping resistors to determine what model a board is.  This allows one
U-Boot image to support multiple boards.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:16 -05:00
Peter Tyser
9660c5de74 xes: Use common PCI initialization code
Common Freescale code for PCI initialization now exists, so migrate X-ES
boards to use it.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:02 -05:00
Kumar Gala
6525d51fa5 powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases
Previously we used an alias the pci node to determine which node to
fixup or delete.  Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.

Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Peter Tyser
64917ca389 PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-01-17 23:06:44 +01:00
Peter Tyser
1bb61b69f7 xes: Use proper IO access functions
Also fix some minor whitespace oddities while we're cleaning up

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:39 -05:00
Kumar Gala
cb151aa2cf pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init.  There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
fb3143b35e pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init.  There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Peter Tyser
ed2c9488bb xes: Remove 8xxx board_add_ram_info() function
This is in preparation for adding one common 8xxx board_add_ram_info()
fuction for all 8xxx boards

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:47 -05:00
Peter Tyser
388517e4b7 xes: Update Freescale clock code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:47 -05:00
Peter Tyser
25623937bb xes: Update Freescale DDR code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:45 -05:00
Peter Tyser
bef3013908 xes: Update Freescale PCI code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:43 -05:00
Kumar Gala
32049b4048 fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:30 -05:00
Kumar Gala
c8514622e2 fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:29 -05:00
Peter Tyser
d9011f9b75 85xx: Enable inbound PCI config cycles for X-ES boards cleanup
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-29 12:48:19 -06:00
Peter Tyser
1f03cbfae2 XPedite5200 board support cleanup
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-29 12:46:36 -06:00
Peter Tyser
78bbc5ce15 XPedite5200 board support
Initial support for Extreme Engineering Solutions XPedite5200 -
a MPC8548-based PMC single board computer.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-19 18:18:51 -06:00
Peter Tyser
487dcb4fb8 85xx: Enable inbound PCI config cycles for X-ES boards
Update X-ES Freescale boards to allow inbound PCI configuration
cycles when configured as agent/endpoint.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-19 18:17:22 -06:00
Peter Tyser
ccf0fdd02b XPedite5370 board support
Initial support for Extreme Engineering Solutions XPedite5370 -
a MPC8572-based 3U VPX single board computer with a PMC/XMC
site.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-19 18:11:49 -06:00