The patch fixing issues reported by DTC:
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have
leading "0x"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Using different node name and label partitions as data.
Also use latest compatible strings based on mainline review.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mainline Linux kernel has adopted SPDX header license in a different
format then was used before. This patch is syncing it up.
Also update years in License text and remove Nathalie's email because it
is no longer valid.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sync pcie and lpd_dma nodes with mainline version.
Incorrect locations are causing diff in statistics that's why
synchronizations are needed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Delete devices implemented in PL, stylistic changes.
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
With U-boot runtime board detect for DTB selection a "default" dtb needs
to be created. This will be used temporarily until the "proper" dtb is
selected.
Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for
board detection via DM_I2C.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support of sysreset with generic driver "syscon-reboot"
provided by RCC, for U-boot and for SPL.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
No more use static frequency HSI = 64MHz for STGEN clock
but HSE (with higher accurency) by default.
Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency
is provided at boot by BootRom and cp15 cntfrq and modified
during clock tree initialization if needed.
When HSI is no more used by any device, this internal
oscillator can be switched off to reduce consumption.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Manage dynamic value for armv7 arch clock timer,
when CONFIG_SYS_HZ_CLOCK is not defined.
Get frequency from CP15 cntfrq information, initialized for example
by first boot stage, clock driver or by BootRom.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Bootrom loads SPL from SDCARD or eMMC
according BootPin selection.
Then SPL loads U-Boot on the same mmc device
with the following predefined GPT partitioning:
on SDCARD: gpt partitioning
1: SPL
2: SPL#2
3: U-Boot
4: bootable partition
on eMMC:
The 2 boot partitions are used for SPL (2 copy)
boot1: SPL
boot2: SPL#2
The user partition use gpt partitioning
1: U-Boot
2: bootable partition
This patch select the correct SPL partition
(3 for SDCARD on mmc0 and 1 for eMMC on mmc1)
according the BootRom information saved in TAMP register
and based on configuration flasg:
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
=> for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new)
=> for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot
And the correct boot_targets is selected according the environment
variables boot_device and boot_instance, with preboot command,
to search the bootable partition with kernel on this device
(generic distro support).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
SPL copy BootRom boot mode information
in TAMP register 21.
This TAMP register information is used
after relocation to set 2 env variables
- boot_device
- boot_instance
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add command GPT support
Add EMMC boot support
Add the 2 other SDMMC instances for ED1:
- SDMMC2 = mmc 1, eMMC on the ED1 board
- SDMMC3 = extension connector, deactivated by default
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This inhibits the re-inititialization of DDR during an RTC-only resume. If
this is not done, an L3 NOC error is produced as the DDR gets accessed
before the re-init has time to complete. Tested on AM437x GP EVM.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com Ported to Latest Master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for
am43xx_evm_rtconly_config. Without this DDR is unstable and can become
corrupted after multiple iterations of RTC+DDR mode.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[j-keerthy@ti.com Ported to latest master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode with DDR in self-refresh. Parse these
registers during SPL boot and jump to the kernel resume vector if the
device is waking up from RTC-only modewith DDR in Self-refresh.
The RTC scratch register layout used is:
SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloader
During the normal boot path the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.
RTC-only +DRR in self-refresh mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com Rebased to latest u-boot master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
In preparation of migration to DM watchdog, clean up a bit.
The 8xx watchdog really is a HW watchdog, so declare it as is
then it goes through Kconfig
And the watchdog reset doesn't mind getting interrupted, so
no need to disable interrupts
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
reginfo is redundant with some of the commands in immap.c, so
move reginfo into that file and remove duplicated info.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Some config is redundant with Kconfig. Fix it.
Also remove unused configs
Move SDRAM_MAX_SIZE in the only place it is used
include/environment.h already defines CONFIG_ENV_SIZE
from CONFIG_ENV_SECT_SIZE and defines CONFIG_ENV_ADDR as
(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
remove BOOTARGS as bootargs is set by the different boot commands
Fix CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE to be in
line with CPM DPRAM organisation
Remove CONFIG_SYS_GBL_DATA_SIZE, CONFIG_SYS_GBL_DATA_OFFSET and
CONFIG_SYS_INIT_SP_OFFSET which are unused
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
u-boot requires some RAM at startup, to store global data structure.
RAM is also needed when we migrate to DM for some initial malloc
This patch implements the proper init of that RAM by calling
board_init_f_alloc_reserve() and board_init_f_init_reserve()
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Some malloc memory is needed at startup for DM model.
Lets reorganise the use of the CPM dpram.
The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as:
IMMR + 0x2000..0x2800: BD/Data/Microcode
IMMR + 0x2800..0x2e00: BD/Data
IMMR + 0x2e00..0x3800: BD/Data/Microcode
IMMR + 0x3800..0x3a00: BD/Data
IMMR + 0x3a00..0x3c00: BD/Data/Microcode
IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers
Lets reallocate all BDs in the 3800..3a00 area and give the full
2800..2e00 for dynamic RAM allocation including global data
That way, the microcode areas remain available if needed one day.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
move it into arch/powerpc/include/asm
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
SPRN_IMMR is defined regardless of the CPU. Therefore, there
is no point in enclosing get_immr() inside a #ifdef CONFIG_8xx
As it a static inline function, it will in any case only be
compiled in functons using it.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Avoid hardcoding the PVR values in C since they are defined
in processor.h
At the same time, remove those multiple PVR values for 8xx and
keep only one that we call PVR_8xx
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
In most places, immap local pointer is defined as
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
In a few places, it is defined as
immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000);
This patch replaces the few of the latest form by the other one.
The two are fully equivalent since SPRN_IMMR is set with CONFIG_SYS_IMMR
very early in start.S
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
AT91 ma5d4evk board uses atmel spi driver, enable DM_SPI to
use dm functionality.
Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Sync DTS from Linux and add FDT support for AT91 ma5d4evk board.
usb0, usb1, usb2 and hlcdc_pwm nodes removed, since there is no support it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
