Commit graph

2 commits

Author SHA1 Message Date
Tom Warren
078078cfa9 spi: Tegra2: Seaboard: fix UART corruption during SPI transactions
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
2012-07-07 14:07:17 +02:00
Simon Glass
cb93481268 tegra2: Implement SPI / UART GPIO switch
The Tegra2 Seaboard has the unfortunate feature that SPI and the console
UART are multiplexed on the same pins. We need to switch between one
and the other during SPI and console activity.

This new file implements a switch and keeps track of which peripheral
owns the pins. It also flips over the controlling GPIO as needed

Since we are adding a second file to board/nvidia/common, we create
a proper Makefile there and remove the direct board.o include from
board/nvidia/seaboard/Makefile

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00