Commit graph

55545 commits

Author SHA1 Message Date
Tom Rini
599fb3bc95 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-19 09:39:42 -05:00
Tom Rini
77c07e7ed3 Add TFA boot flow for more boards
Add TFA boot defconfig for ls1088a and ls2088a.
 Add dts fixup for PCIe endpoint and root complex.
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Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for more boards

Add TFA boot defconfig for ls1088a and ls2088a.
Add dts fixup for PCIe endpoint and root complex.
2019-01-18 23:11:51 -05:00
Tom Rini
c4d323793b Merge branch '2019-01-18-master-imports'
- Bugfix for SPI environment optimization
- Spelling fixes
- Remove some defconfigs per various maintainers
- Minor db410, bananapi r2 fixes
- Bump QEMU to v3.1.0 for most platforms
2019-01-18 13:40:41 -05:00
Heiko Schocher
3d5931e598 env: sf: fix environment in SPI NOR
commit 9a9d66f5ef ("env: add spi_flash_read_env function")

breaks Environment functionality, as it reads only
until 2 \0 are found, but fills the buffer with 0x0
instead 0xff which leads in an incorrect crc sum.

Fix: init the read buffer with 0xff instead 0x00

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-01-18 13:40:36 -05:00
Felix Brack
2c3ec20fcc arm: dts: am335x-pdu001: Sync with Linux 5.0-rc2
This patch synchronizes the PDU001 board DTS file with the one used by
Linux 5.0-rc2.
Signed-off-by: Felix Brack <fb@ltec.ch>
2019-01-18 13:40:35 -05:00
Faiz Abbas
8fa7f65dd0 configs: Remove am335x_boneblack_defconfig
The am335x_evm_defconfig supports all am335x_boneblack variants. Remove
the redundant am335x_boneblack_defconfig.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18 13:40:35 -05:00
Felix Brack
8f0d44cb3e arm: am335x-pdu001: Remove SPI support
On this board SPI is only used to configure the SoC driving the LC TFT
display which is not used in U-Boot. Hence remove SPI support.

Signed-off-by: Felix Brack <fb@ltec.ch>
2019-01-18 13:40:35 -05:00
Quentin Schulz
a645831ca0 cmd: mtd: fix compilation warning for help when SYS_LONGHELP=n
cmd/mtd.c:447:13: warning: ‘mtd_help_text’ defined but not used [-Wunused-variable]
static char mtd_help_text[] =
            ^~~~~~~~~~~~~

When SYS_LONGHELP is not defined. After looking at how other commands
work, we should surround the whole help text (even its declaration) with
an #ifdef CONFIG_SYS_LONGHELP, since it's compiled out when calling
_CMD_HELP[1] on the help text variable argument to U_BOOT_CMD.

[1] https://elixir.bootlin.com/u-boot/latest/source/include/command.h#L181

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-01-18 13:40:34 -05:00
Michal Simek
facdc5fb83 travis: Switch QEMU to 3.1.0 version
Vexpress ca15_tc2 is failing with 3.1.0 because of QEMU issue.
When this patch is applied
https://patchwork.kernel.org/patch/10754401/
Vexpress can be also turn to newer QEMU version.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18 13:40:34 -05:00
Michal Simek
984a1feb71 travis: Setup QEMU_VERSION as variable
This change enables setting up specific Qemu version or sha1 for new
targets which are added after (current) v3.0.0 version.
This changes is preparation step for adding new Xilinx Versal Virt
platform which was merge after v3.0.0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18 13:40:34 -05:00
Tom Rini
aa13261215 travis: Break up the NXP Layerscape jobs more
The single job for all Layerscape 10xx platforms is close to, and
sometimes exceeds the time limit for a single job configuration.  Break
this down into jobs for LS101x, LS104x and LS108x instead.  While in
here, in the name portion of these jobs, refer to them as NXP for ARM
and not Freescale as they've been NXP for quite some time.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-18 13:40:30 -05:00
Jagan Teki
543049ab59 usb: host: Drop [e-o]hci-sunxi drivers
Now Allwinner platform is all set to use Generic USB
controller drivers, so remove the legacy sunxi drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
29d280c88a sunxi: usb: Switch to Generic host controllers
Onc of key blocker for using USB Generic host controller
drivers in Allwinner are CLK and RESET drivers, now these
available for USB usage.

So switch sunxi USB use EHCI and OHCI Generic controllers.

Enabling USB is wisely a board choise, So Enable USB_OHCI_HCD
where it already have USB_EHCI_HCD

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
b9aa0a9332 musb-new: sunxi: Use CLK and RESET support
Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on musb driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-18 22:19:09 +05:30
Jagan Teki
652ee2788f reset: Add reset valid
Add reset_valid to check whether given reset is valid
or not.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
089ffd0aed phy: sun4i-usb: Use CLK and RESET support
Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on phy driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-18 22:19:09 +05:30
Jagan Teki
e236ff0a51 arm: sunxi: Enable CLK, RESET
CLK and DM_RESET drivers are now available for all of
the Allwinner platforms, so enable them in arch/arm/Kconfig

Enabling CLK will select DM_RESET by default.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
aa86bf90d1 sunxi: A64: Update sun50i-a64-ccu.h
Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree:
commit 679294497be31596e1c9c61507746d72b6b05f26
Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Date:   Wed Sep 26 19:48:24 2018 +0000
    arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay

This should be a part of previous sync patch from
commit 1b39a1834e
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Mon Oct 29 00:56:47 2018 +0000

    sunxi: A64: Update .dts/.dtsi files

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
6901aab8e3 clk: sunxi: Add Allwinner A80 CLK driver
Add initial clock driver for Allwinner A80.

- Implement UART bus clocks via ccu_clk_gate table for
  A80, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement UART bus resets via ccu_reset table for A80,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
8dcc7e6922 ARM: dts: sun8i: Update A80 dts(i) from Linux-v4.18-rc3
Update all A80 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

arch/arm/boot/dts/sun9i-a80*:

commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

include/dt-bindings/*/sun9i-a80-*:

commit 783ab76ae553abc23f80ef7511052d055697531b
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Sat Jan 28 20:22:36 2017 +0800

    clk: sunxi-ng: Add A80 Display Engine CCU

Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
dts is not available in Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
337fcdc06b clk: sunxi: Add Allwinner H6 CLK driver
Add initial clock driver for Allwinner H6.

- Implement UART bus clocks via ccu_clk_gate table for
  H6, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement UART bus resets via ccu_reset table for H6,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
8606f960d4 clk: sunxi: Implement UART resets
Implement UART resets for all relevant Allwinner SoC
clock drivers via ccu reset table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
4acc711930 clk: sunxi: Implement UART clocks
Implement UART clocks for all Allwinner SoC
clock drivers via ccu clock gate table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
6239a6d092 clk: sunxi: Add Allwinner V3S CLK driver
Add initial clock driver for Allwinner V3S.

- Implement USB bus and USB clocks via ccu_clk_gate table
  for V3S, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for V3S, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
78eb2a41f3 clk: sunxi: Add Allwinner R40 CLK driver
Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_gate
  for R40, so it can accessed in common clk enable
  and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for R40, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
03d87f5909 clk: sunxi: Add Allwinner A83T CLK driver
Add initial clock driver for Allwinner A83T.

- Implement USB bus and USB clocks via ccu_clk_gate table
  for A83T, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for A83T, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
3ab029368a clk: sunxi: Add Allwinner A23/A33 CLK driver
Add initial clock driver for Allwinner A23/A33.

- Implement USB bus and USB clocks via ccu_clk_gate table
  for A23/A33, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for A23/A33, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
4927e2e8d3 clk: sunxi: Add Allwinner A31 CLK driver
Add initial clock driver for Allwinner A31.

- Implement USB ahb1 and USB clocks via ccu_clk_gate table
  for A31, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB ahb1 and USB resets via ccu_reset table
  for A31, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
c8e743c1e8 clk: sunxi: Add Allwinner A10s/A13 CLK driver
Add initial clock driver for Allwinner A10s/A13.

- Implement USB ahb and USB clocks via ccu_clk_gate table
  for A10s/A13, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset table for A10s/A13,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
6590bd8c47 clk: sunxi: Add Allwinner A10/A20 CLK driver
Add initial clock driver for Allwinner A10/A20.

- Implement USB ahb and USB clocks via ccu_clk_gate table
  for A10/A20, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset table for A10/A20,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
e945816efb clk: sunxi: Add Allwinner H3/H5 CLK driver
Add initial clock driver for Allwinner H3/H5.

- Implement USB bus and USB clocks via ccu_clk_gate table for
  H3/H5, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table for
  H3/H5, so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
99ba430870 reset: Add Allwinner RESET driver
Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
0d47bc7056 clk: Add Allwinner A64 CLK driver
Add initial clock driver for Allwinner A64.

Implement USB clock enable and disable functions for
OHCI, EHCI, OTG and USBPHY gate and clock registers
via ccu clk gate table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Aleksandr Aleksandrov
7d659573ce board: sun50i-h5: Add Emlid Neutis N5 support
Emlid Neutis N5 is a SoM based on Allwinner H5, has a WiFi & BT
module, DDR3 RAM and eMMC.

- add neutis-devboard target to dtb makefile
- add dtsi file for Neutis N5 needs
- add config file for Neutis N5 Dev board

Signed-off-by: Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: update proper commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:08 +05:30
Stefan Mavrodiev
da1ae5905e sunxi: board: Add i2c initialization for sun50i
To use TWI0/1/2 the user can select CONFIG_I2C#_ENABLE.
However even the controller is enabled, the mux for the pins
are not set.

This patch follows the existing mux method. Since the pads are
different, separate check is added for each i2c.

Tested with A64-SOM204 board.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-18 22:19:08 +05:30
Vignesh R
cec96b83a0 configs: Remove am43xx_evm_ethboot_defconfig
am43xx_evm_ethboot_defconfig is not being actively used and has not been
moved to DM or DT. Also, ethboot cannot be tested on AM43xx EVM as such
due EVM limitations. Therefore delete it.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18 09:26:14 -05:00
Vignesh R
311e658ef3 configs: Remove unused am335x_evm defconfigs
These defconfigs don't seem be actively used any more, and have not been
moved to adapt DM or DT. Therefore delete them.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-18 09:26:14 -05:00
Vignesh R
4a1e5f92f7 configs: am335x_evm: Enable DM_SPI and DM_SPI_FLASH
Enable DM_SPI and DM_SPI_FLASH for actively used defconfigs for
am335x_evm.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-01-18 09:26:14 -05:00
Frank Wunderlich
f3af98eca5 adding saveenv-command for bananapi r2
bananapi r2 can be booted from sd-card and emmc
saving the environment have to choose the storage
from which the device has booted

also the offset is set to 1MB to make sure env is written
to block "user data area" between uboot and first partition

https://www.fw-web.de/dokuwiki/lib/exe/fetch.php?cache=&media=bpi-r2:boot-structure.png

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2019-01-18 09:26:04 -05:00
Patrick Wildt
5d94158aa9 mkimage: fixup CONFIG_FIT_EXTERNAL_OFFSET
The last parameter is expected to be the imagefile.  Since -E is a
flag having the output name before -p will make mkimage ignore the
external offset option.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-01-18 09:16:15 -05:00
Chris Packham
6e7051144f lib: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
8e34c1d34a video: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-18 09:16:15 -05:00
Chris Packham
cb4d1bbe51 pinctrl: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
7475145449 i2c: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18 09:16:15 -05:00
Chris Packham
83e7a4d597 drivers: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
d7a4af45c5 work_92105: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18 09:16:15 -05:00
Chris Packham
9259c92386 x86: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
d7cf868f88 arm: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18 09:16:15 -05:00
Chris Packham
2dcfa05852 common: spl: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
3aeb771cbc Kconfig: fix spelling
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00