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3 commits

Author SHA1 Message Date
Kever Yang
217273cd44 rockchip: clk: remove RATE_TO_DIV 
Use DIV_ROUND_UP instead RATE_TO_DIV for all Rockchip SoC
clock driver.
Add or fix the div-field overflow check at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
 2017-08-13 17:15:09 +02:00
Tom Rini
872faf5d13 clk_rv1108.c: Fix unused variable warning 
The variables gpll_init_cfg and apll_init_cfg are unused in this file,
remove them.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-06-23 10:38:05 -04:00
Andy Yan
bae2f282a9 rockchip: clk: Add rv1108 clock driver 
Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-06-07 07:29:25 -06:00