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14 commits

Author SHA1 Message Date
Sean Anderson
38ef64e6ce spl: nand: Set bl_len to page size
Since commit 34793598c8 ("mtd: nand: mxs_nand_spl: Remove the page aligned
access") there are no longer any users of nand_get_mtd. However, it is
still important to know what the page size is so we can allocate a
large-enough buffer. If the image size is not page-aligned, we will go off
the end of the buffer and clobber some memory.

Introduce a new function nand_page_size which returns the page size. For
most drivers it is easy to determine the page size. However, a few need to
be modified since they only keep the page size around temporarily.

It's possible that this patch could cause a regression on some platforms if
the offset is non-aligned and there is invalid address space immediately
before the load address. spl_load_legacy_img does not (except when
compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or
SPL_LOAD_IMX_CONTAINER (none in tree) would be affected.

defconfig               CONFIG_TEXT_BASE
======================= ================
am335x_evm              0x80800000
am43xx_evm              0x80800000
am43xx_evm_rtconly      0x80800000
am43xx_evm_usbhost_boot 0x80800000
am43xx_hs_evm           0x80800000
dra7xx_evm              0x80800000
gwventana_nand          0x17800000
imx8mn_bsh_smm_s2       0x40200000

All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q
which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the
i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a
little underflow.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-16 12:43:48 -05:00
Simon Glass
1e94b46f73 common: Drop linux/printk.h from common header
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h

Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-24 09:54:57 -04:00
Tom Rini
39fa17718f global: Migrate CONFIG_LPC32XX_NAND_MLC_WR_LOW to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_WR_LOW to CFG_LPC32XX_NAND_MLC_WR_LOW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
196690dfda global: Migrate CONFIG_LPC32XX_NAND_MLC_WR_HIGH to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_WR_HIGH to CFG_LPC32XX_NAND_MLC_WR_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
259ec2ce11 global: Migrate CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY to CFG_LPC32XX_NAND_MLC_TCEA_DELAY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
3c35c036ad global: Migrate CONFIG_LPC32XX_NAND_MLC_RD_LOW to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_RD_LOW to CFG_LPC32XX_NAND_MLC_RD_LOW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
ab8c6e370c global: Migrate CONFIG_LPC32XX_NAND_MLC_RD_HIGH to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_RD_HIGH to CFG_LPC32XX_NAND_MLC_RD_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
ea93286e5f global: Migrate CONFIG_LPC32XX_NAND_MLC_NAND_TA to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_NAND_TA to CFG_LPC32XX_NAND_MLC_NAND_TA

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
dff9de5c2c global: Migrate CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY to CFG
Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY to CFG_LPC32XX_NAND_MLC_BUSY_DELAY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:50 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Tom Rini
1cefed1e39 nand.h: Cleanup linux/mtd/rawnand.h usage
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward
declaration of struct nand_chip, so do that directly.  Then, include
<linux/mtd/rawnand.h> where required directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Vladimir Zapolskiy
a098ce2142 mtd: nand: lpc32xx mlc: predefine number of NAND chips to support
Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC
driver only, as a preparation for potential removal or replacement of
the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same
value is used by the single user Work Microwave Work 92105 board, thus
it will be safe now to remove the option as a board specific one.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-11-16 13:34:36 -05:00
Miquel Raynal
a430fa06a4 mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Renamed from drivers/mtd/nand/lpc32xx_nand_mlc.c (Browse further)