Commit graph

4 commits

Author SHA1 Message Date
Philipp Tomsich
572045b6e7 rockchip: dts: rk3399-puma: Add DDR3-1600 timings and use for Puma
With the validation done for DDR3-1600 (i.e. 800 MHz bus clock), we
add the timings (rk3399-sdram-ddr3-1600.dtsi) and change rk3399-puma.dts
to use these by default.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop blank line at end of file:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
faf1afc473 rockchip: dts: rk3399-puma: make the DTS dual-licensed
The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
This updates the licensing info in the rk3399-puma.dts.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-15 10:13:17 -06:00
Philipp Tomsich
35d1b6dc08 rockchip: dts: rk3399-puma: disable 'fifo-mode' in sdmmc
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-15 10:13:17 -06:00
Philipp Tomsich
3c2bbd5886 dts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM
The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399
in a Qseven-compatible form-factor.

These changes add a device-tree describing the board and its
interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).

This includes the following changes from the original development:

 * dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile
 * dts: rk3399-puma: add gmac for the RK3399-Q7

This change enables the Gigabit Ethernet support on the RK3399-Q7.

 * dts: rk3399-puma: use serial0 for stdout
 * dts: rk3399-puma: prepare the sdmmc node for SPL booting
 * dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash

The RK3399-Q7 (Puma) unsually (this is a build-time option for
customised boards) has an on-module SPI-flash connected to SPI1.
As of today, this is a Winbond W25Q32DW (32MBit) device.

The SPI5 controller is routed to the Q7 edge connector and provides
general-purpose SPI connectivity for customer base-boards.

With some minor improvements on integration into our outbound tree
 - explicitly modelled the SPI flash as 'spiflash' under spi0
   [dts: rk3399-puma: explicitly model spi-flash under spi1]
 - renamed the aliases to spi0 and spi1 to allow easier use of
   commands and legacy (SPL) infrastructure... i.e. the controllers
   will be 0 and 1 for 'sf probe', 'sspi', etc.
   [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]

 * dts: rk3399-puma: include SPI in the spl-boot-order property

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:01:57 -06:00