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8 commits

Author SHA1 Message Date
Vladimir Zapolskiy
8d1809a966 spl: nand: simple: replace readb() with chip specific read_buf()
Some NAND controllers define custom functions to read data out,
respect this in order to correctly support bad block handling in
simple SPL NAND framework.

NAND controller specific read_buf() is used even to read 1 byte in
case of connected 8-bit NAND device, it turns out that read_byte()
may become outdated.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2015-08-12 20:47:33 -04:00
Brian Norris
27ce9e4290 mtd: nand: force NAND_CMD_READID onto 8-bit bus
As per following Sections in ONFI Spec, NAND_CMD_READID should use only
lower 8-bit for transfering command, address and data even on x16 NAND device.

*Section: Target Initialization"
"The Read ID and Read Parameter Page commands only use the lower 8-bits of the
 data bus. The host shall not issue commands that use a word data width on x16
 devices until the host determines the device supports a 16-bit data bus width
 in the parameter page."

*Section: Bus Width Requirements*
"When the host supports a 16-bit bus width, only data is transferred at the
 16-bit width. All address and command line transfers shall use only the lower
 8-bits of the data bus. During command transfers, the host may place any value
 on the upper 8-bits of the data bus. During address transfers, the host shall
 set the upper 8-bits of the data bus to 00h."

Thus porting  following commit from linux-kernel to ensure that column address
is not altered to align to x16 bus when issuing NAND_CMD_READID command.

    commit 3dad2344e92c6e1aeae42df1c4824f307c51bcc7
    mtd: nand: force NAND_CMD_READID onto 8-bit bus
    Author: Brian Norris <computersforpeace@gmail.com> (preserving authorship)

    The NAND command helpers tend to automatically shift the column address
    for x16 bus devices, since most commands expect a word address, not a
    byte address. The Read ID command, however, expects an 8-bit address
    (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
    0x20).

    This fixes the column address for a few drivers which imitate the
    nand_base defaults.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:03 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Stefano Babic
d3022c5f5c nand_spl_simple: store ecc data on the stack
Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM
which is likely to contain already loaded data.
The patch saves the oob data and the ecc on the stack replacing
the fixed address in RAM.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ilya Yanok <yanok@emcraft.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Simon Schwarz <simonschwarzcor@googlemail.com>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:06:21 -06:00
Anatolij Gustschin
18b89072f6 drivers/mtd/nand/nand_spl_simple.c: Fix GCC 4.6 warnings
Fix warnings for both cases:

definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST:
nand_spl_simple.c: In function 'nand_read_page':
nand_spl_simple.c:156:6: warning: variable 'stat' set but not used
[-Wunused-but-set-variable]

not definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST:
nand_spl_simple.c: In function 'nand_read_page':
nand_spl_simple.c:196:6: warning: variable 'stat' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-12-07 16:01:56 -06:00
Ilya Yanok
1df308e5be nand_spl_simple: add support for software ECC
This patch adds support for software ECC to the nand_spl_simple driver.
To enable this one have to define CONFIG_SPL_NAND_SOFTECC.

Tested on OMAP3.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-12-06 23:59:36 +01:00
Heiko Schocher
68bb829500 spl, nand: add 4bit HW ecc oob first nand_read_page function
similiar to commit dc7cd8e59b, only
adapted for the new spl framework.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Simon Schwarz
12c2f1ee3c spl: add NAND Library to new SPL
Adds NAND library to SPL.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00