Commit graph

23 commits

Author SHA1 Message Date
Daniel Schwierzeck
df50b3b414 net: pcnet: refactor mapping of virtual addresses to physical ones
pci_virt_to_mem() uses virt_to_phys() to get the physical address.
But pci_virt_to_mem() is also called with uncached addresses which
is wrong according to the documentation of virt_to_phys().

Refactor the PCI_TO_MEM() macro to optionally map an uncached address
back to a cached one before calling pci_virt_to_mem().

Currently pcnet works because virt_to_phys() is incorrectly implemented
on MIPS. With the upcoming asm header file update for MIPS, the
virt_to_phys() implementation will be fixed. Thus this patch is needed
to keep pcnet working on MIPS Malta board.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
Joe Hershberger
1fd92db83d net: cosmetic: Fix var naming net <-> eth drivers
Update the naming convention used in the network stack functions and
variables that Ethernet drivers use to interact with it.

This cleans up the temporary hacks that were added to this interface
along with the DM support.

This patch has a few remaining checkpatch.pl failures that would be out
of the scope of this patch to fix (drivers that are in gross violation
of checkpatch.pl).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:33 -06:00
Paul Burton
6fb49e4aa0 pcnet: force ordering of descriptor accesses
The ordering of accesses to the rx & tx descriptors is important, yet
the send & recv functions accessed them via regular structure accesses.
This leaves the compiler with the opportunity to reorder those accesses
or to hoist them outside of loops. Prevent that from happening by using
readl & writel to access the descriptors. As a nice bonus, this removes
the need for the driver to care about endianness.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-18 10:42:30 -04:00
Paul Burton
a354ddc3d7 pcnet: align rx buffers for cache invalidation
The RX buffers are invalidated when a packet is received, however they
were not suitably cache-line aligned. Allocate them seperately to the
pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure
suitable alignment for the cache invalidation, preventing anything else
being placed in the same lines & lost.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-18 10:42:30 -04:00
Paul Burton
f1ae382dfd pcnet: access descriptor rings & init block uncached
The prior accesses to the descriptor rings & init block via cached
memory had a few issues:

  - The memory needs cache flushes or invalidation at the appropriate
    times, but was not necessarily aligned on cache line boundaries.
    This could lead to data being incorrectly lost or written back to
    RAM at the wrong time.

  - There are points where ordering of writes to the memory is
    important, but because it's cached memory the pcnet controller
    would see cache lines written back ordered by address. This could
    occasionally lead to hardware seeing descriptors in an incorrect
    state.

  - Flushing the cache constantly is inefficient.

So, to avoid all of those issues simply access the descriptors & init
block via uncached memory. The MIPS-specific UNCACHED_SDRAM macro is
used to do this (retrieving an address in kseg1) as I could see no
existing generic solution. Since the MIPS Malta board is the only user
of the pcnet driver, hopefully this doesn't matter.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-18 10:42:30 -04:00
Wolfgang Denk
649acfe149 MPC824x: remove obsolete "PN62" board
The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade.  It is now
causing build issues.  Instead of wasting time on things nobody is
interested in any more, we rather drop this board.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@grandegger.com>
cc: Tom Rini <trini@ti.com>
2013-11-11 14:46:24 -05:00
Paul Burton
62715a2c57 pcnet: enable the NOUFLO feature
On relatively slow boards (such as the MIPS Malta with an FPGA core
card) it can be extremely common for transmits to underflow - to the
point where it appears they simply do not work at all. Setting the
NOUFLO bit causes the ethernet controller to not begin transmission on
the wire until a transmit start point is reached. Setting that transmit
start point to the full packet will cause the controller to only
transmit the packet once it has buffered it entirely thus preventing any
transmit underflows from occuring and allowing the controller to
function on slower boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Paul Burton
f3ac866c78 pcnet: add cache flushing & invalidation
Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data from being transmitted or received, and prevents the driver
from getting stuck waiting for the ethernet controller to update
descriptors when in reality it has but the old values are being read
from cache.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Paul Burton
a95400411b pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_send
This should cause no change to the generated code, but is semantically
correct.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Paul Burton
6011dabd0a pcnet: code style cleanup
Fix up the code to match Documentation/CodingStyle. This is mostly
removing extraneous spaces.

No functional change is intended.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-09 17:21:01 +01:00
Gabor Juhos
54fbcb0c04 net: pcnet: use pci_virt_to_mem to obtain buffer addresses
The pcnet driver uses the pci_phys_to_mem function
to get the memory address of the DMA buffers. This
This assumes an 1:1 mapping between the PCI and
physical memory which is not true on all platforms.

On MIPS platform U-Boot is running within a mapped
memory region, and the pci_phys_to_mem macro can't
be used to obtain the memory address of the buffers.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Joe Hershberger
f92a151cd1 drivers/net/pcnet.c: Fix compile warning
Fix this:
pcnet.c: In function 'pcnet_initialize':
pcnet.c:224:13: warning: assignment from incompatible pointer type

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-22 23:17:52 -05:00
Wolfgang Denk
138b60895d drivers/net/pcnet.c: Change debug code to fix build warning
Fix:
pcnet.c: In function 'pcnet_probe':
pcnet.c:247:8: warning: variable 'chipname' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
2011-11-07 22:18:06 +01:00
Nobuhiro Iwamatsu
5ed0eeca38 net: pcnet: Add initialized eth_device structure
pcnet driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
2010-11-14 23:17:45 +01:00
Ben Warren
e3090534d6 Moved initialization of PCNET Ethernet controller to board_eth_init()
Affected boards:
	PN62
	sc520_cdp

Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:17 -07:00
Shinya Kuribayashi
3b904ccb93 net: Conditional COBJS inclusion of network drivers
Replace COBJS-y with appropriate driver config names.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-06-09 23:21:05 -07:00
Wolfgang Denk
f2c288a353 pcnet.c: fix a merge issue
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 12:48:47 +02:00
Vlad Lungu
386563197e Fixed pcnet io_base
Bus and phys address are not always the same

Signed-off-by: Vlad Lungu <vlad@comsys.ro>
2008-04-24 23:49:00 +02:00
Wolfgang Denk
11ea26fd1c drivers/net/pcnet.c: Coding Style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-24 23:44:26 +02:00
Vlad Lungu
899ef7b845 Added Am79C970A chip id to pcnet
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
2008-04-24 23:43:10 +02:00
Ben Warren
422b1a0160 Fix Ethernet init() return codes
Change return values of init() functions in all Ethernet drivers to conform
to the following:

    >=0: Success
    <0:  Failure

All drivers going forward should return 0 on success.  Current drivers that
return 1 on success were left as-is to minimize changes.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-By: Timur Tabi <timur@freescale.com>
2008-01-10 01:06:02 +01:00
Jean-Christophe PLAGNIOL-VILLARD
2439e4bfa1 drivers/net : move net drivers to drivers/net
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-25 18:35:17 +01:00
Renamed from drivers/pcnet.c (Browse further)