Commit graph

13 commits

Author SHA1 Message Date
Luca Ceresoli
66b39c1a8c arm64: zynqmp: remove Avnet UltraZed-EV Starter Kit
Nobody seems interested and able to keep this board supported, and
xilinx_zynqmp_virt_defconfig is supposed to be enough for any zynqmp board.

See the discussion at: https://lore.kernel.org/u-boot/CAPnjgZ3hHbyiFf=_Lp-Wz_XOWBkV-3vK4Q3xp=7bcERw-spNpA@mail.gmail.com/T/#m76d726f1ab3f7074c8105c9a2af2110ac7d18708

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20230111082554.1930782-1-luca.ceresoli@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-11 10:43:39 +01:00
Luca Ceresoli
9129a6b49a board/xilinx/zynqmp/MAINTAINERS: change e-mail address for Luca Ceresoli
My Bootlin address is the preferred one now.

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Link: https://lore.kernel.org/r/20221203214939.56608-1-luca@lucaceresoli.net
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-05 08:55:55 +01:00
Michal Simek
fcbdd7a070 .mailmap: Start to use new amd.com email address
Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb994 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-04-19 14:51:11 -04:00
Heinrich Schuchardt
a3bbd0b912 Correct U-Boot upstream repository
The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git
effective 2021-02-28.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-28 13:57:30 -05:00
Michal Simek
0109db1cd1 xilinx: Fill git repository for Xilinx boards
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Siva Durga Prasad Paladugu
f1b97b5f18 xilinx: cmd: Add support for FRU commands
This patch adds support for fru commands "fru capture" and "fru display".
The fru capture parses the FRU table present at an address and stores in a
structure for later use. The fru display prints the content of captured
structured in a readable format.

As of now, it supports only common header and board area of FRU. Also, it
supports only English language code and ASCII8/BINARY formats.

fru_data variable is placed to data section because fru parser can be
called very early before bss is initialized. And also information needs to
be shared that's why it is exported via header.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Luca Ceresoli
216dad7507 arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EV
The board was added without adding a MAINTAINERS entry.

Fixes:

  $ ./tools/genboardscfg.py -f
  WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
  WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
  $

Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Michal Simek
46e765226c arm64: zynqmp: Cover ultra96 dts file by MAINTAINERS fragment
Avnet Ultra96 dts file should be also cover by MAINTAINERS fragment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-21 10:07:11 -04:00
Tom Rini
b1aad8dbe2 zynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-07 11:36:39 -04:00
Michal Simek
8ae3d0b50c MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments
Fix my fragments to list all files in the repo.

Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f24036)

And cover dts files in board MAINTAINERS files.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Michal Simek
6d3ddfc473 ARM64: zynqmp: Simplify MAINTAINERS file to support more boards
Handle all Xilinx ZynqMP boards with one fragment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04 20:28:38 +02:00
Siva Durga Prasad Paladugu
0b54a9dd09 zynqmp: Define ep config for ZynqMP
Define a new config "zynqmp_ep" for ZynqMP instead
of xilinx_zynqmp. This defconfig supports all emulation
platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP
to ARCH_ZYNQMP.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Michal Simek
84c7204bd1 arm64: Add Xilinx ZynqMP support
Add basic Xilinx ZynqMP arm64 support.
Serial and SD is supported.
It supports emulation platfrom ep108 and QEMU.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-02 18:41:54 +01:00