Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid
conflicts with UEFI secure boot.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the SPI_FLASH_BAR for the ESPI controller of FSL, this entry
is missed by
commit 6d82517836 ("configs: Don't use SPI_FLASH_BAR as default")
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
While getting the 'subarg' of 'hwconfig' env variable in
config_core_prefetch(), if no hwconfig variable is defined,
below warning is received:
WARNING: Calling __hwconfig without a buffer and
before environment is ready
Fix this by checking 'hwconfig' env variable.
If not found return without further processing.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Add the missing RGMII PHY modes in which case the MAC has configure its
RGMII settings. The only difference between these modes is the RX and
TX delay configuration. A user might choose any RGMII mode in the device
tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The saved ofnode is used by some PHY drivers to access the device tree
node of the PHY.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The fsl-layerscape already occupies board_late_init(), therefore it is
not possible for a board to have its own board_late_init(). Introduce
fsl_board_late_init() which can be implemented in the board specific
code.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The clocks are not dependent on the target but only on the SoC.
Therefore, convert the CONFIG_TARGET_x macros to the corresponding
CONFIG_ARCH_x. This will allow other targets to automatically use the
common code. Otherwise every new target would have to add itself to the
"#if defined(CONFIG_TARGET_x) || .." macros.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Erratum A-050382 states that the eDMA ICID programmed in the eDMA_AMQR
register in DCFG is not correctly forwarded to the SMMU.
The workaround consists in programming the eDMA ICID in the eDMA_AMQR
register in DCFG to 40.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n), below
compilation error appears
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
'CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT' undeclared here (not in a function)
Fix it by wrapping with CONFIG_IS_ENABLED().
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
These macros should only be used when CONFIG_FSL_CAAM is present.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If the secure world reset handlers are used (via CONFIG_PSCI_RESET),
then do not use the layerscape-specific implementation.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This allows the use of PSCI calls to trusted firmware to
initiate reset and poweroff events with CONFIG_PSCI_RESET and
CONFIG_ARM_PSCI_FW. This is desirable, for example, if the target
board has implemented a custom reset or poweroff procedure in EL3.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In ls_pcie_ep_enable_cfg(), as part of EP setup,config ready bit
of pci controller is set, so that RC can read the config space of EP.
While setting the config ready bit, LTSSM_EN bit in same register was
also inadvertently getting cleared. This restarts the link training
between RC and EP.
Update code to just set the desired CFG_READY bit (bit 0),
while leaving the other bits unchanged.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that we have again fixed the problems that building with clang
exposes, enable these tests on Azure and GitLab-CI as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
When using the OVERRIDE variable we need to pass -O to buildman as well
to use the "override" option to buildman.
Fixed: e9500f49ea ("travis: Use buildman for building with clang")
Signed-off-by: Tom Rini <trini@konsulko.com>
Newer versions of LLVM-7 will provide an unused function warning over
console_doenv() in the case of SYS_CONSOLE_IS_IN_ENV not being enabled
as can be the case in SPL. Add guards around this function.
Signed-off-by: Tom Rini <trini@konsulko.com>
imx targets are defined in arch/arm/mach-imx/Makefile.
Some of them are dependent on targets defined in main
Makefile. For the Makefile in arch/arm/mach-imx this
targets must be finished before the imx targets are
build, if not you get for example the error:
make -f /home/hs/abb/mainlining/u-boot/scripts/Makefile.build obj=arch/arm/mach-imx u-boot-dtb.imx
make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 'u-boot-dtb.imx'. Stop.
make[1]: *** [/home/hs/abb/mainlining/u-boot/Makefile:1123: u-boot-dtb.imx] Error 2
make[1]: *** Waiting for unfinished jobs....
make[1]: Leaving directory '/work/hs/compile/u-boot/aristainetos2_defconfig'
make: *** [Makefile:148: sub-make] Error 2
compile failed
In above case of CONFIG_MULTI_DTB_FIT is defined, the
u-boot-dtb.imx is dependent on the u-boot-fit-dtb.bin
which may is not build yet ...
I could reproduce this error on a travis build also if
I build an out-of-tree build on a local machine with a
build directory on a "slow" slow storage device. If
building the same source target with a build dir on a
fast storage device, the build works.
I found no solution to tell the arch/arm/mach-imx/Makefile
to find the targets in main Makefile, if there is a way
this would be the better fix.
I solved it by adding a IMX_DEPS var, which holds a list
of main u-boot targets, which must be finished, before
calling imx targets and fixed the build for imx
targets which enabled CONFIG_MULTI_DTB_FIT.
I think it is just luck, that imx targets with
CONFIG_OF_SEPARATE enabled build, because the
u-boot-dtb.imx target depends on u-boot-dtb.bin
which gets build early enough before starting with
u-boot-dtb.imx. May this targets should be fixed too.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
add DM PCI support on the socrates board.
use PCIE_FSL now.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
add socrates device tree from linux:
commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest")
and added SPDX license identifier.
Did not fix checkpatch warnings:
arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines
arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible
Also, add me as board maintainer.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
add DM based PCI Configuration space access support for
MPC85xx PCI Bridge. This driver is based on
arch/powerpc/cpu/mpc85xx/pci.c
In the old driver there is a fix for a hw issue on the
TARGET_MPC8555CDS and TARGET_MPC8541CDS boards. As I
have no such hardware I did not port this part.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
With python3 we're now tripping over a long-standing problem with how we
add to the buildman file with some toolchains. We cannot have multiple
toolchain-alias sections as that leads to a parse error.
Signed-off-by: Tom Rini <trini@konsulko.com>
To enable HS400(ES) and UHS for imx8m platforms, update the driver data
to share with imx8qm esdhc_soc_data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
During mmc initialization, there are several calls to mmc_set_clock
and mmc_set_ios. When mmc_power_off, the mmc->clock will be set,
but the imx driver will use 400KHz. So the following calls
to mmc_set_ios will set the clock several times which is redundant
in fsl_esdhc_imx driver. So let's simplify to remove redundant
clock settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The QorIQ eSDHC on all platforms supports checking write protect
state through register bit. So check it always.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The fsl_esdhc_init() was actually to get configuration of mmc_config.
So rename it to fsl_esdhc_get_cfg_common() and make it common for both
DM_MMC and non-DM_MMC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
This patch is to clean up bus width setting code.
- For DM_MMC, remove getting "bus-width" from device tree.
This has been done in mmc_of_parse().
- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
to fsl_esdhc_initialize() which is non-DM_MMC specific.
And fix up bus width configuration to support only 1-bit, 4-bit,
or 8-bit. Keep using 8-bit if it's not set because many platforms
use driver without providing max bus width.
- Remove bus_width member from fsl_esdhc_priv structure.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Controller initialization is not needed in fsl_esdhc_init().
It will be done in esdhc_init() for non-DM_MMC, and in
esdhc_init_common() in probe for DM_MMC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Update this tool to use Python 3 to meet the 2020 deadline.
Unfortunately this introduces a test failure due to a problem in pylibfdt
on Python 3. I will investigate.
Signed-off-by: Simon Glass <sjg@chromium.org>
When preparing to possible expand or contract an entry we reset the size
to the original value from the binman device-tree definition, which is
often None.
This causes binman to forget the original size of the entry. Remember this
so that it can be used when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
